SZF2002 datasheet(20/76 Pages) PHILIPS

20 / 76 page

1998 Aug 26

Philips Semiconductors

Product speciﬁcation

Low voltage 8-bit microcontroller with

6-kbyte embedded RAM

SZF2002

12.3

Timer/Counter 2 Control Register (T2CON)

Table 6

Timer/Counter 2 Control Register (SFR address C8H)

Table 7

Description of T2CON bits

76543210

TF2

EXF2

RCLK0

TCLK0

EXEN2

TR2

C/T2

CP/RL2

BIT

SYMBOL

DESCRIPTION

TF2

Timer 2 overﬂow ﬂag. Set by a Timer 2 underﬂow or overﬂow and must be cleared by

software. TF2 will not be set when in either the Baud Rate generation mode or Clock out

mode.

EXF2

Timer 2 external ﬂag. Set when either a capture or reload is caused by a negative

transition on T2EX and when EXEN2 = 1. In Auto-reload mode it is toggled on an

underﬂow or overﬂow. Cleared by software.

RCLK0

Receive clock 0 ﬂag. When set, causes the UART to use Timer 2 overﬂow pulses.

RCLK0 = 0, causes Timer 1 overﬂow pulses to be used.

TCLK0

Transmit clock 0 ﬂag. When set, causes the UART to use Timer 2 overﬂow pulses.

TCLK0 = 0, causes Timer 1 overﬂow pulses to be used.

EXEN2

Timer 2 external enable ﬂag. When set, allows a capture or reload to occur, together

with an interrupt, as a result of a negative transition on input T2EX (if in Capture mode

or Auto-reload mode with DCEN reset). If in Auto-reload mode and DCEN is set, this bit

has no inﬂuence. In the other modes EXF2 is set and an interrupt is generated on a

HIGH-to-LOW transition on T2EX pin. In all modes EXEN2 = 0, causes Timer 2 to

ignore events at T2EX.

TR2

Timer 2 start/stop control. When TR2 = 1, Timer 2 is started.

1C/T2

Timer or counter select for Timer 2. C/T2 = 0, selects the internal timer with a clock

frequency of 1

⁄6fclk. C/T2 = 1, selects the external event counter; negative edge

triggered.

CP/RL2

Capture/Reload ﬂag. Selection of Capture or Auto-reload mode.

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