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SZF2002 датащи(PDF) 9 Page - NXP Semiconductors |
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SZF2002 датащи(HTML) 9 Page - NXP Semiconductors |
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9 / 76 page ![]() 1998 Aug 26 9 Philips Semiconductors Product specification Low voltage 8-bit microcontroller with 6-kbyte embedded RAM SZF2002 Note 1. The pin layout has been optimized for easy connection of 256 kbytes Flash ROM (e.g. ATMEL AT29LV010A, SGS-Thomson M28V201, or AMD Am29F010). General PWM 7 Pulse Width Modulation output. RST 8 Reset. A HIGH level on this pin for at least 12 clock cycles resets the device. XCLK 9 Clock input. EA 38 External Access. When EA is HIGH the CPU executes out of internal program memory (unless the program counter exceeds 7FFFH). A LOW EA forces the CPU to execute out of external memory regardless of the value of the Program Counter. This signal is latched at the falling edge of reset (RST pin). The EA pin has an internal pull-down. When it is not connected the CPU executes from external memory. DEBUG 39 DEBUG enable. If HIGH, forces standard 80C51 timing signals output at address and databus. In this mode the databus is multiplexed with the lower 8 bits of the address bus, and the A0 to A3 lines are used for the RD, WR, ALE and PSEN signals. This allows a standard 80C51 in-circuit emulator to be connected. For normal operation connect DEBUG to VSS. Power VDD 10, 50, 70 Power supply digital core and digital I/O pads. VSS 11, 51, 71 Ground: circuit ground potential. VDDA 30 Analog power. VSSA 31 Analog ground. n.c. 1, 20, 21, 40, 41, 60, 61, 80 Not connected. SYMBOL PIN DESCRIPTION |
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