XRT79L71IB datasheet(82/109 Pages) EXAR

82 / 109 page

XRT79L71

1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - HARDWARE

REV. 1.0.0

NOTE: Registers associated within each functional block are specified in ascending order (based upon the on-chip Address

Location). No other inferences should be made regarding the order in which these registers are presented in this

table.

Once the µC/µP has read out the contents of the appropriate registers (as listed above in Table 5), then there

may (or may not) be additional interrupt status registers to read as described below.

Interrupt Servicing for the DS3/E3 Framer Block

If, upon reading out the contents of the Operation Interrupt Status Registers that the interrupting block is the

DS3/E3 Framer block then the user should execute a READ operation to the Framer Block Interrupt Status

Depending upon which of these bit-fields are set to "1", the µC/µP (while executing the Interrupt Service

Routine) will need to branch to reading out the appropriate register as depicted below in Table 6.

Receive ATM Cell/PPP

Packet Processor Block

Receive ATM Cell Processor Block - Receive ATM Interrupt Status Register -

Byte 1

0x170A

Receive ATM Cell Processor Block - Receive ATM Interrupt Status Register -

Byte 0

0x170B

Transmit ATM Cell/PPP

Packet Processor Block

Transmit ATM Cell Processor Block - Transmit ATM Interrupt Status Register -

Byte 1

0x1F0B

Framer Block Interrupt Status Register (Address = 0x1105)

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

Receive

DS3/E3

Framer

Block Inter-

rupt Status

Receive

PLCP Pro-

cessor Block

Interrupt Sta-

tus

Unused

Transmit

DS3/E3

Framer

Block Inter-

rupt Status

One Second

Interrupt Sta-

tus

R/O

RUR

TABLE 6: INTERRUPT SERVICE ROUTINE GUIDE FOR THE DS3/E3 FRAMER BLOCK

BIT NUMBER

ASSERTED IN

BIT-FIELD NAME

NEXT REGISTER TO READ WITHIN INTERRUPT

SERVICE ROUTINE

ADDRESS

LOCATION OF

NEXT REGISTER

Receive DS3/E3 Framer Block Interrupt Sta-

tus

RxDS3 Interrupt Status Register

0x1113

RxE3 Interrupt Status Register # 1

0x1114

RxE3 Interrupt Status Register # 2

0x1115

RxDS3 FEAC Interrupt Enable/Status Regis-

ter

0x1117

RxDS3/E3 LAPD Control Register

0x1118

Receive PLCP Processor Block Interrupt

Status

RxPLCP Interrupt Status Register

0x1192

TABLE 5: INTERRUPT SERVICE ROUTINE GUIDE FOR THE XRT79L71

INTERRUPT FUNCTIONAL

BLOCK

THE NEXT REGISTER TO BE READ DURING THE INTERRUPT SERVICE ROUTINE

ADDRESS

LOCATION

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