XRT79L71IB datasheet(29/109 Pages) EXAR

29 / 109 page

XRT79L71

REV. 1.0.0

1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - HARDWARE

TxUPrty/

TxPPrty

Transmit UTOPIA Data Bus - Parity Input/Transmit POS-PHY Interface - Par-

ity Input:

The function of this input pin depends upon whether the XRT79L71 has been

configured to operate in the ATM UNI or PPP Mode.

ATM UNI Mode - TxUPrty - Transmit UTOPIA Interface - Parity Input pin:

The ATM Layer processor will apply the parity value of the byte or word which is

being applied to the Transmit UTOPIA Data Bus (e.g., TxUData[15:8] or TxU-

Data[15:0]) inputs of the XRT79L71, respectively.

NOTE: This parity value can be computed based upon either the even or odd-

parity of the data applied at the Transmit UTOPIA Data Bus.

The

Transmit

UTOPIA

Interface

block

(within

the

XRT79L71)

will

independently compute either the even or odd-parity value of each byte

(or word) that it receives from the ATM Layer processor and will compare

it with the logic level of this input pin.

The Transmit UTOPIA Interface block within the XRT79L71 will independently

compute an odd-parity value of each byte (or word) that it receives from the ATM

Layer processor and will compare it with the logic level of this input pin.

PPP Mode - TxPPrty - Transmit POS-PHY Interface - Parity Input pin:

The Link Layer Processor will apply the parity value of the byte or word which is

being applied to the Transmit POS-PHY Data Bus (e.g., TxPData[15:8] or TxP-

Data[15:0]) inputs of the XRT79L71, respectively.

NOTES:

This parity value can be computed based upon either the even or odd-

parity of the data applied to the Transmit POS-PHY Data Bus. The

Transmit POS-PHY Interface block (within the XRT79L71) will

independently compute either the even or odd-parity value of each byte

(or word) that it receives from the Link Layer processor and will

compare it will the logic level of this input pin.

This input pin is only active if the user has configured the XRT79L71 to

operate in either the ATM UNI or the PPP Mode. The user should tie

this input pin to GND to operate the XRT79L71 in either the Clear-

Channel Framer or High-Speed HDLC Controller Modes.

PIN #NAME

TYPE

DESCRIPTION

XRT79L71IB датащи(PDF) 29 Page - Exar Corporation

XRT79L71IB датащи(HTML) 29 Page - Exar Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL