TMD3721 datasheet(61/89 Pages) OSRAM

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[v3-00] 2023-May-26

TMD3721 − Register O ver view

ASP2_L Register (Address 0xE4)

Figure 84:

ASP2_L Register

ASP2_H Register (Address 0xE5)

Figure 85:

ASP2_H Register

ASP1 ASP2 are ALS data Sampling Periods in addition to ATIME.

It allows for short integration time with 1.357μs resolution.

ASP1 ASP2 need to be programmed greater than 12μs.

Once enabled, the ALS data sampling sequence is

ASP1–>ASP2–>ASP1–>ASP2–>…

If ASP1 is 0, ASP1 and ASP2 are disabled. The ALS data sampling

sequence is ATIME–>ATIME–>ATIME–>…

ASP2 should not be programmed 0. If only ASP1 period is

required, ASP2 needs to be programmed same as ASP1.

Addr: 0xE4

ASP2_L

Bit

Bit Name

Default

Access

Bit Description

7:0

ASP2_L

0x00

ASP2_L is lower byte of the ASP2 (ALS data Sampling

Period 2).

It is a 14bit value split into 2 registers {ASP2_H[5:0], ASP2_

L[7:0]}.

ASP2 is in multiples of 1.357us resolution, and should be

programmed >12us.

ASP2 should not be programmed 0. If only ASP1 is

required, ASP2 needs to be programmed same as ASP1.

Value

Sampling Cycles

Sampling Period

0x0009

1.357μs x9

0x000A

1.357μs x10

………

0x3FFF

16383

1.357μs x16383

Addr: 0xE5

ASP2_H

Bit

Bit Name

Default

Access

Bit Description

7:6

Reserved

Reserved. Must be set to default value.

5:0

ASP2_H

000000

ASP2_H is upper byte of the ASP2 (ALS data Sampling

Period 2).

See ASP2_L for the value settings.

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