PCA5007 datasheet(94/112 Pages) PHILIPS

94 / 112 page

1998 Oct 07

Philips Semiconductors

Product speciﬁcation

Pager baseband controller

PCA5007

14 APPENDIX 1: SPECIAL MODES OF THE PCA5007

14.1

Overview

During the rising edge of the external RESOUT signal, the

state of pins ALE, PSEN and EA and P2.X is sampled and

stored. The following decoding (ALE, PSEN and P2) is

used to force the PCA5007 into different operating modes:

[1, 1, X]

→ RUN mode

[0, 1, X]

→ EMUlation modes (for P2 decoding refer to

Metalink documents)

[1, 0, Y]

→ test mode, submode Y

[0, 0, X]

≥ OTP parallel programming mode.

The customer will usually only see the normal RUN mode.

14.2

OTP parallel programming mode

The OTP parallel programming mode is used to access the

on-chip OTP directly from the device pins for programming

and verification. The OTP parallel programming mode and

its initialization are explained in detail in Chapter 15.

14.3

Test modes

The test modes of the PCA5007 are used during the

production test of the circuit. Test modes are not intended

to be used by customers except test mode 2, the

demodulator and clock recovery test mode.

Test mode 2 may be used by customers for Bit Error Rate

(BER) measurements in closed-loop systems.

The following application diagram (see Fig.59) shows an

application, which enters this mode during start-up. After

the test mode is entered the PCA5007 starts execution of

code from the internal program memory. This code must

enable the demodulator and clock recovery in the required

modes. If the microcontroller is requested to make

port I/O, then a frequency of approximately 6 MHz with

VDD level needs to be supplied at the TCLK pin.

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