PCA5007 datasheet(80/112 Pages) PHILIPS

80 / 112 page

1998 Oct 07

Philips Semiconductors

Product speciﬁcation

Pager baseband controller

PCA5007

Notes

1. DC/DC converter configured with inductor of L = 470

µH, SRL = 5 Ω, input capacitance of Ci = 4.7 µF, ESR = 0.5 Ω,

VDD output capacitor Co = 4.7 µF, ESR = 0.5 Ω, RBAT <1 Ω.

2. The required VBAT for starting the circuit after connecting it to the battery is 1.1 V. But once in place, the battery can

be used until it is discharged to 0.9 V.

3. This parameter is not tested during production; it is covered by other measurements.

4. The accuracy of the voltage is defined by maximum offset and ripple voltage. DC offset is defined by the accuracy

of the internal band gap reference and the offset of comparators, whereas the ripple voltage is defined by the limits

of the allowed voltage window of the regulated VDD.

5. The ripple in standby mode is defined by VBAT, L, tn and ESR (see Table 54).

6. PCA5007 set to standby mode by software: 76.8 kHz oscillator running, DC/DC converter running in standby mode,

all timers/counters disabled except RTC, microcontroller Idle, all outputs open-circuit, no supply current delivered to

external circuits.

7. This parameter depends on external components and is not tested during production; hence no guarantee.

8. PCA5007 set to receive mode by software: 76.8 kHz and 6 MHz oscillator running, DC/DC converter running in

normal mode, wake-up counter, clock compensation, watchdog timer, T0 and T1 enabled, demodulator set to direct

input data, AFC disabled, microcontroller Idle, all outputs open-circuit, no supply current delivered to external circuits.

9. Rs = total series resistance = RBAT +SRL+RDS(on) + ESR.

10. The minimum supply voltage is determined by the start-up sequence of the device. When the start-up sequence is

completed, the supply voltage can be lowered to 1.8 V.

11. The microcontroller operates with approximately1.9 million instructions per second at VDD = 2.2 V. The current

consumption at this supply voltage is 0.7 mA/MIPS (peripheral blocks as e.g. timers, DC/DC converter, I2C-bus,

UART, demodulator etc., are excluded). The current required from VDD is then 1.35 mA (typ.). This scales to

sunk from VBAT.

12. In mass program mode the current can increase to 100 mA.

13. This parameter is not tested during production; it is guaranteed by design.

RL(DAC)

allowed resistive load at

DAC output

−−

Ω

CL(DAC)

allowed capacitive load at

DAC output

−−

Isource

AFCOUT source current

VDD = 2.2 V;

VAFCOUT =VDD − 0.4 V;

code = 111111

−−895

−100

µA

Isink

AFCOUT sink current

VDD = 2.2 V;

VAFCOUT = 0.4 V;

code = 000000

−µA

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

BAT

------------

2.5 mA

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