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AM29LV640MH датащи(PDF) 33 Page - Advanced Micro Devices |
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AM29LV640MH датащи(HTML) 33 Page - Advanced Micro Devices |
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33 / 62 page ![]() December 14, 2005 Am29LV640MH/L 31 DA TA SH EET an all zero data pattern prior to electrical erase. The system is not required to provide any controls or tim- ings during these operations. After the command sequence is written, a sector erase time-out of 50 µs occurs. During the time-out period, additional sector addresses and sector erase com- mands may be written. Loading the sector erase buffer may be done in any sequence, and the number of sec- tors may be from one sector to all sectors. The time between these additional cycles must be less than 50 µs, otherwise erasure may begin. Any sector erase ad- dress and command following the exceeded time-out may or may not be accepted. It is recommended that processor interrupts be disabled during this time to en- sure all commands are accepted. The interrupts can be re-enabled after the last Sector Erase command is written. Any command other than Sector Erase or Erase Suspend during the time-out period resets the device to the read mode. The system must re- write the command sequence and any additional ad- dresses and commands. Note that the SecSi Sector, autoselect, and CFI functions are unavailable when an erase operation is in progress. The system can monitor DQ3 to determine if the sec- tor erase timer has timed out (See the section on DQ3: Sector Erase Timer.). The time-out begins from the ris- ing edge of the final WE# pulse in the command sequence. When the Embedded Erase algorithm is complete, the device returns to reading array data and addresses are no longer latched. The system can determine the status of the erase operation by reading DQ7, DQ6, or DQ2 in the erasing sector. Refer to the Write Opera- tion Status section for information on these status bits. Once the sector erase operation has begun, only the Erase Suspend command is valid. All other com- mands are ignored. However, note that a hardware reset immediately terminates the erase operation. If that occurs, the sector erase command sequence should be reinitiated once the device has returned to reading array data, to ensure data integrity. Figure 7 illustrates the algorithm for the erase opera- tion. Refer to the Erase and Program Operations ta- bles in the AC Characteristics section for parameters, and Figure 19 section for timing diagrams. Notes: 1. See Tables 10 and 11 for erase command sequence. 2. See the section on DQ3 for information on the sector erase timer. Figure 7. Erase Operation START Write Erase Command Sequence (Notes 1, 2) Data Poll to Erasing Bank from System Data = FFh? No Yes Erasure Completed Embedded Erase algorithm in progress |
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