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AT43USB353M датащи(PDF) 55 Page - ATMEL Corporation |
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AT43USB353M датащи(HTML) 55 Page - ATMEL Corporation |
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55 / 95 page ![]() 55 AT43USB353M 3307B–USB–4/04 Port A Input Pins Address – PINA The Port A Input Pins address (PINA) is not a register, and this address enables access to the physical value on each Port A pin. When reading PORTA the Port A Data Latch is read, and when reading PINA, the logical values present on the pins are read. PortA as General Digital I/O All 8 pins in Port A have equal functionality when used as digital I/O pins. PAn, General I/O Pin: The DDAn bit in the DDRA register selects the direction of this pin, if DDAn is set (one), PAn is configured as an output pin. If DDAn is cleared (zero), PAn is config- ured as an input pin. If PORTAn is set (one) when the pin is configured as an input pin, the MOS pull-up resistor is activated. To switch the pull-up resistor off, the PORTAn has to be cleared (zero) or the pin has to configured as an output pin. The Port A pins are tri-stated when a reset condition becomes active, even if the clock is not active. Note: n: 7,6...0, pin number. Port D Port D is a 7-bit bi-directional I/O port. Its output buffers can sink or source 2 mA. Three I/O memory address locations are allocated for the Port D, one each for the Data Regis- ter - PORTD, $12($32), Data Direction Register (DDRD), $11($31) and the Port D Input Pins (PIND), $10($30). The Port D Input Pins address is read only, while the Data Register and the Data Direction Register are read/write. All port pins have individually selectable pull-up resistors. When pins PD0 to PD7 are used as inputs and are externally pulled low, they will source current if the internal pull-up resistors are activated Some Port D pins have alternate functions as shown in Table 25. When the pins are used for the alternate function the DDRD and PORTD register has to be set according to the alternate function description. Bit 7 654 3 2 1 0 $19 ($39) PINA7 PINA6 PINA5 PINA4 PINA3 PINA2 PINA1 PINA0 PINA Read/Write R R R R R R R R Initial Value N/A N/A N/A N/A N/A N/A N/A N/A Table 24. DDAn Effects on Port A Pins DDAn PORTAn I/O Comment 0 0 Input Tri-state (Hi-Z) 0 1 Input PAn will source current if ext. pulled low. 1 0 Output Push-Pull Zero Output 1 1 Output Push-Pull One Output Table 25. Port D Alternate Functions Port Pin Alternate Function PD2 INT0, External Interrupt 0 PD3 INT1, External Interrupt 1 PD4 ICP, Timer/Counter, Input Capture PD5 OC1A Timer/Counter1 Output Compare A PD6 OC1B Timer/Counter1 Output Compare B |
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