AT43USB353M datasheet(38/95 Pages) ATMEL

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AT43USB353M

3307B–USB–4/04

16-bit

Timer/Counter1

Operation

The 16-bit Timer/Counter1 clock source is prescaled from CK, 12 MHz. In addition, it can be

stopped as described in the specification for the Timer/Counter1 Control Registers (TCCR1A

and TCCR1B). The different status flags (overflow, compare match and capture event) are

found in the Timer/Counter Interrupt Flag Register (TIFR). Control signals are found in the

Timer/Counter1 Control Registers (TCCR1A and TCCR1B). The interrupt enable/disable set-

tings for Timer/Counter1 are found in the Timer/Counter Interrupt Mask Register (TIMSK).

The 16-bit Timer/Counter1 features both a high resolution and a high accuracy usage with the

lower prescaling opportunities. Similarly, the high prescaling opportunities makes the

Timer/Counter1 useful for lower speed functions or exact timing functions with infrequent

actions.

The Timer/Counter1 supports two Output Compare functions using the Output Compare Reg-

iste r 1 A and B (O CR1A and OCR1 B) as th e d ata sources to b e com pa re d to the

Timer/Counter1 contents. The Output Compare functions include optional clearing of the

counter on compareA match, and actions on the Output Compare pins on both compare

matches.

Timer/Counter1 can also be used as a 8-, 9- or 10-bit Pulse With Modulator. In this mode the

counter and the OCR1A/OCR1B registers serve as a dual glitch-free stand-alone PWM with

centered pulses.

The Input Capture function of Timer/Counter1 provides a capture of the Timer/Counter1 con-

tents to the Input Capture Register - ICR1, triggered by an external event on the Input Capture

Pin (ICP/PF3). The actual capture event settings are defined by the Timer/Counter1 Control

is permanently set so that the ICP input is routed to the noise canceler. In the AT43USB353M,

the ICP function is shared with port D pin, PD4.

If the noise canceler function is enabled, the actual trigger condition for the capture event is

monitored over 4 samples, and all 4 must be equal to activate the capture flag.

Figure 12. ICP Pin Schematic Diagram

ICP

NOISE CANCELER

EDGE SELECT

ICNC1

ICES1

ICF1

ACIC

ACO

ACIC: COMPARATOR IC ENABLE

ACC0: COMPARATOR OUTPUT

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