AT43USB355_06 datasheet(43/115 Pages) ATMEL

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AT43USB355

2603G–USB–04/06

16-bit

Timer/Counter1

Operation

The 16-bit Timer/Counter1 can select clock source from CK, prescaled CK or an external pin.

In addition, it can be stopped as described in the specification for the Timer/Counter1 Control

Registers (TCCR1A and TCCR1B). The different status flags (overflow, compare match and

capture event) are found in the Timer/Counter Interrupt Flag Register (TIFR). Control signals

are found in the Timer/Counter1 Control Registers (TCCR1A and TCCR1B). The interrupt

enable/disable settings for Timer/Counter1 are found in the Timer/Counter Interrupt Mask

When Timer/Counter1 is externally clocked, the external signal is synchronized with the oscil-

lator frequency of the CPU. To assure proper sampling of the external clock, the minimum

time between two external clock transitions must be at least one internal CPU clock period.

The external clock signal is sampled on the rising edge of the internal CPU clock.

The 16-bit Timer/Counter1 features both a high resolution and a high accuracy usage with the

lower prescaling opportunities. Similarly, the high prescaling opportunities makes the

Timer/Counter1 useful for lower speed functions or exact timing functions with infrequent

actions.

The Timer/Counter1 supports two Output Compare functions using the Output Compare Reg-

ister 1 A and B (OCR1A and OCR1B) as the data sources to be compared to the

Timer/Counter1 contents. The Output Compare functions include optional clearing of the

counter on compareA match, and actions on the Output Compare pins on both compare

matches.

Timer/Counter1 can also be used as a 8-, 9- or 10-bit Pulse With Modulator. In this mode the

counter and the OCR1A/OCR1B registers serve as a dual glitch-free stand-alone PWM with

centered pulses.

The Input Capture function of Timer/Counter1 provides a capture of the Timer/Counter1 con-

tents to the Input Capture Register - ICR1, triggered by an external event on the Input Capture

Pin (ICP/PF3). The actual capture event settings are defined by the Timer/Counter1 Control

ACO, is permanently set so that the ICP input is routed to the noise canceler.

If the noise canceler function is enabled, the actual trigger condition for the capture event is

monitored over 4 samples, and all 4 must be equal to activate the capture flag.

Figure 15. ICP Pin Schematic Diagram

ICP

NOISE CANCELER

EDGE SELECT

ICNC1

ICES1

ICF1

ACIC

ACO

ACIC: COMPARATOR IC ENABLE

ACC0: COMPARATOR OUTPUT

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