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AT43USB355 датащи(PDF) 17 Page - ATMEL Corporation |
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AT43USB355 датащи(HTML) 17 Page - ATMEL Corporation |
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17 / 115 page ![]() 17 AT43USB355 2603G–USB–04/06 All AT43USB355 I/O and peripherals, except for the USB hardware registers, are placed in the I/O space. The I/O locations are accessed by the IN and OUT instructions transferring data between the 32 general-purpose working registers and the I/O space. I/O registers within the address range $00 – $1F are directly bit-accessible using the SBI and CBI instructions. In these registers, the value of single bits can be checked by using the SBIS and SBIC instruc- tions. Refer to the instruction set documentations of the AVR for more details. When using the I/O specific commands, IN and OUT, the I/O address $00 – $3F must be used. When address- ing I/O registers as SRAM, $20 must be added to this address. All I/O register addresses throughout this document are shown with the SRAM address in parentheses. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses should never be written. USB Hub A block diagram of the USB hardware of the AT43USB355 is shown in Figure 6. The USB hub of the AT43USB355 has 3 downstream ports. The embedded function is permanently attached to Port 1. Ports 2 and 3 are available as external ports. The actual number of ports used is strictly defined by the firmware of the AT43USB355 and can vary from 0 to 2. Because the exact configuration is defined by firmware, ports 2 and 3 may even function as perma- nently attached ports as long as the Hub Descriptor identifies them as such. USB Function The embedded USB function has its own device address and has a default end-point plus 3 other programmable end-points. Two of these end-points contain their own 64-byte FIFO while the third end-point has an 8-byte FIFO. End-points 1 - 3 can be programmed as interrupt IN or OUT or bulk IN or OUT end-points. $07 ($27) ADCSR ADC Control and Status Register $06 ($26) PORTF Data Register, Port F $05 ($25) DDRF Data Direction Register, Port F $04 ($24) PINF Input Pins, Port F $03 ($23) ADCH ADC High Byte Data Register $02 ($22) ADCL ADC Low Byte Data Register Table 5. I/O Memory Space (Continued) I/O (SRAM) Address Name Function |
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