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AT43USB355 датащи(PDF) 36 Page - ATMEL Corporation |
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AT43USB355 датащи(HTML) 36 Page - ATMEL Corporation |
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36 / 115 page ![]() 36 AT43USB355 2603G–USB–04/06 Suspend/Resume Interrupt Enable Register – SPRSIE • Bit 7..4 – Res: Reserved Bits These bits are reserved and are always read as zeros. • Bit 3 – BUS INT EN: USB Reset Interrupt Enable When the BUS INT EN bit is set, the USB and microcontroller resets are separated. A USB bus reset (SE0 for longer than 3 ms) will reset the USB hardware only and not the microcon- troller. However, an interrupt to the microcontroller will be generated and bit 3 of SPRSR is set. • Bit 2 – FRWUP IE: Function Remote Wakeup Interrupt Enable Setting the FRWUP IE bit will initiate an interrupt whenever the FRWUP bit of SPRSR is set. • Bit 1 – RSM IE: Resume Interrupt Enable Setting the RSM IE bit will initiate an interrupt whenever the RSM bit of SPRSR is set. • Bit 0 – GLB SUSP IE: Global Suspend Interrupt Enable Setting the GLB SUSP IE bit will initiate an interrupt whenever the GLB SUSP bit of SPRSR is set. Suspend/Resume Interrupt Mask Register – SPRSMSK The bits of the Suspend/Resume Mask Register are used to make an interrupt caused by an event in the Suspend/Resume Register visible to the microcontroller. The Suspend/Resume Interrupt Enable Register bits enable the interrupt while the Suspend/Resume Interrupt Mask Register allows the microcontroller to control when it wants visibility to an interrupt. 1 = Enable Mask, 0 = Disable Mask. • Bit 7..4 – Res: Reserved Bits These bits are reserved and are always read as zeros. • Bit 3 – BUS INT MSK: USB Reset Interrupt Mask • Bit 2 – FRWUP MSK: Function Remote Wakeup Interrupt Mask • Bit 1 – RSM MSK: Resume Interrupt Mask • Bit 0 – GLB SUSP MSK: Global Suspend Interrupt Enable Bit 7 6 5 4 3 2 1 0 $1FF9 – – – – BUS INT FRWUP RSM GLB SUSP SPRSIE Read/Write R R R R R/W R R R Initial Value 0 0 0 0 0 0 0 0 Bit 7 6 5 4 3 2 1 0 $1FF8 – – – – BUS INT MSK FRWUP MSK RSM GLB SUSP SPRSMSK Read/Write R R R R W W W W Initial Value 0 0 0 0 0 0 0 0 |
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