SST25VF080B datasheet(10/33 Pages) MICROCHIP

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DS20005045D-page 10

SST25VF080B

4.4.4

AUTO ADDRESS INCREMENT (AAI)

WORD PROGRAM

The AAI program instruction allows multiple bytes of

data to be programmed without re-issuing the next

sequential address location. This feature decreases

total programming time when multiple bytes or entire

memory array is to be programmed. An AAI Word pro-

gram instruction pointing to a protected memory area

will be ignored. The selected address range must be in

the erased state (FFH) when initiating an AAI Word

Program operation. While within AAI Word program-

ming sequence, only the following instructions are

valid: for software end of write detection—AAI Word

(ADH), WRDI (04H), and RDSR (05H); for hardware end

of write detection—AAI Word (ADH) and WRDI (04H).

There are three options to determine the completion of

each AAI Word program cycle: hardware detection by

reading the Serial Output, software detection by polling

the BUSY bit in the software STATUS Register, or wait

TBP. Refer to

Section 4.4.5 “End of Write Detection”

for details.

Prior to any write operation, the Write Enable (WREN)

instruction must be executed. Initiate the AAI Word

Program instruction by executing an 8-bit command,

ADH, followed by address bits [A23-A0]. Following the

addresses, two bytes of data are input sequentially,

each one from MSb (Bit 7) to LSb (Bit 0). The first byte

of data (D0) is programmed into the initial address [A23-

A1] with A0 = 0, the second byte of Data (D1) is pro-

grammed into the initial address [A23-A1] with A0 = 1.

CE# must be driven high before executing the AAI

Word Program instruction. Check the Busy status

before entering the next valid command. Once the

device indicates it is no longer busy, data for the next

two sequential addresses may be programmed, fol-

lowed by the next two, and so on.

When programming the last desired word, or the high-

est unprotected memory address, check the busy sta-

tus using either the hardware or software (RDSR

instruction) method to check for program completion.

Once programming is complete, use the applicable

method to terminate AAI. If the device is in Software

End of Write Detection mode, execute the Write-Dis-

able (WRDI) instruction, 04H. If the device is in AAI

Hardware End of Write Detection mode, execute the

Write Disable (WRDI) instruction, 04H, followed by the

8-bit DBSY command, 80H. There is no wrap mode

during AAI programming once the highest unprotected

memory address is reached. See Figure 4-8 and

Figure 4-9 for the AAI Word programming sequence.

4.4.5

END OF WRITE DETECTION

There are three methods to determine completion of a

program cycle during AAI Word programming: hard-

ware detection by reading the Serial Output, software

detection by polling the BUSY bit in the Software STA-

TUS Register, or wait TBP. The Hardware End of Write

detection method is described in the section below.

4.4.6

HARDWARE END OF WRITE

DETECTION

The Hardware End of Write detection method elimi-

nates the overhead of polling the BUSY bit in the Soft-

ware STATUS Register during an AAI Word program

operation. The 8-bit command, 70H, configures the

Serial Output (SO) pin to indicate Flash Busy status

during AAI Word programming. (see Figure 4-6) The

8-bit command, 70H, must be executed prior to initiat-

ing an AAI Word Program instruction. Once an internal

programming operation begins, asserting CE# will

immediately drive the status of the internal flash status

on the SO pin. A ‘0’ indicates the device is busy and a

‘1’ indicates the device is ready for the next instruction.

De-asserting CE# will return the SO pin to tri-state.

While in AAI and Hardware End of Write detection

mode, the only valid instructions are AAI Word (ADH)

and WRDI (04H).

To exit AAI Hardware End of Write detection, first exe-

cute WRDI instruction, 04H, to reset the Write Enable

Latch bit (WEL = 0) and AAI bit. Then execute the 8-bit

DBSY command, 80H, to disable RY/BY# status during

the AAI command. See Figure 4-7 and Figure 4-8.

FIGURE 4-6:

ENABLE SO AS

HARDWARE RY/BY#

DURING AAI

PROGRAMMING

FIGURE 4-7:

DISABLE SO AS

HARDWARE RY/BY#

DURING AAI

PROGRAMMING

CE#

SCK

0 1 234 5 6 7

MODE 0

MODE 3

CE#

SCK

0 1 234 5 6 7

MODE 0

MODE 3

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