LTC2486IDE datasheet(26/36 Pages) LINER

26 / 36 page

LTC2486

2486f

APPLICATIONS INFORMATION

Figure 11. Internal Serial Clock, Continuous Operation

The input data is shifted through the SDI pin on the ris-

ing edge of SCK (including the ﬁrst rising edge) and the

output data is shifted out the SDO pin on the falling edge

of SCK. The data input/output cycle is concluded and a

new conversion automatically begins after the 24th rising

edge of SCK. During the next conversion, SCK and SDO

remain HIGH until the conversion is complete.

The Use of a 10k Pull-Up on SCK for Internal SCK

Selection

⎯C⎯S is pulled HIGH while the converter is driving SCK

LOW, the internal pull-up is not available to restore SCK

to a logic HIGH state if SCK is ﬂoating. This will cause the

device to exit the internal SCK mode on the next falling

edge of

⎯C⎯S. This can be avoided by adding an external 10k

pull-up resistor to the SCK pin.

Whenever SCK is LOW, the LTC2486’s internal pull-up at

SCK is disabled. Normally, SCK is not externally driven if

the device is operating in the internal SCK timing mode.

However, certain applications may require an external

EOC

SCK

(INTERNAL)

SDI

SDO

2486 F11

CONVERSION

DATA INPUT/OUTPUT

BIT 20 BIT 19 BIT 18 BIT 17 BIT 16 BIT 15 BIT 14 BIT 13

BIT 12 BIT 11

BIT 21

BIT 22

BIT 23

SGL

EN2

SPD

GS2

GS1

GS0

ODD

BIT 10

BIT 9

BIT 0

121314

1516

DON'T CARE

MSB

SIG

“0”

VCC

SCK

SDI

SDO

GND

REFERENCE

VOLTAGE

0.1V TO VCC

ANALOG

INPUTS

= EXTERNAL OSCILLATOR

= INTERNAL OSCILLATOR

LTC2486

3-WIRE

SPI INTERFACE

OPTIONAL

10k

VCC

REF+

REF–

CH0

CH1

CH2

CH3

COM

2.7V TO 5.5V

0.1

µF

CONVERSION

driver on SCK. If the driver goes Hi-Z after outputting a

LOW signal, the internal pull-up is disabled. An external

10k pull-up resistor prevents the device from exiting the

internal SCK mode under this condition.

A similar situation may occur during the sleep state when

⎯C⎯S is pulsed HIGH-LOW-HIGH in order to test the conver-

sion status. If the device is in the sleep state (

⎯E⎯O⎯C = 0),

SCK will go LOW. If

⎯C⎯S goes HIGH before the time t

EOCtest,

the internal pull-up is activated. If SCK is heavily loaded,

the internal pull-up may not restore SCK to a HIGH state

before the next falling edge of

⎯C⎯S. The external 10k pull-up

resistor prevents the device from exiting the internal SCK

mode under this condition.

PRESERVING THE CONVERTER ACCURACY

The LTC2486 is designed to reduce as much as possible

sensitivity to device decoupling, PCB layout, anti-aliasing

circuits, line frequency perturbations, and temperature

sensitivity. In order to achieve maximum performance a

few simple precautions should be observed.

LTC2486IDE датащи(PDF) 26 Page - Linear Technology

LTC2486IDE датащи(HTML) 26 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

датащи скачать

ссылки URL