LTC2486IDE datasheet(11/36 Pages) LINER

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LTC2486

2486f

PIN FUNCTIONS

FO(Pin1):FrequencyControlPin.Digitalinputthatcontrols

the internal conversion clock rate. When FO is connected

to GND, the converter uses its internal oscillator running at

307.2kHz. The conversion clock may also be overridden by

driving the FO pin with an external clock in order to change

the output rate and the digital ﬁlter rejection null.

SDI (Pin 2): Serial Data Input. This pin is used to select

the gain, line frequency rejection mode, 1x or 2x speed

mode, temperature sensor, as well as the input channel.

The serial data input is applied under control of the serial

clock (SCK) during the data output/input operation. The

ﬁrst conversion following a new input or mode change

is valid.

SCK (Pin 3): Bidirectional, Digital I/O, Clock Pin. In Internal

Serial Clock Operation mode, SCK is generated internally

and is seen as an output on the SCK pin. In External Serial

Clock Operation mode, the digital I/O clock is externally

applied to the SCK pin. The Serial Clock operation mode

is determined by the logic level applied to the SCK pin at

power up and during the most recent falling edge of

⎯C⎯S.

⎯C⎯S (Pin 4): Active LOW Chip Select. A LOW on this pin

enables the digital input/output and wakes up the ADC.

Following each conversion, the ADC automatically enters

the Sleep mode and remains in this low power state as

long as

⎯C⎯S is HIGH. A LOW-to-HIGH transition on ⎯C⎯S

during the data output aborts the data transfer and starts

a new conversion.

SDO (Pin 5): Three-State Digital Output. During the data

output period, this pin is used as the serial data output.

When the chip select pin is HIGH, the SDO pin is in a high

impedance state. During the conversion and sleep periods,

this pin is used as the conversion status output. When

the conversion is in progress this pin is HIGH; once the

conversion is complete SDO goes low. The conversion

status is monitored by pulling

⎯C⎯S LOW.

GND (Pin 6): Ground. Connect this pin to a common ground

plane through a low impedance connection.

COM (Pin 7): The common negative input (IN–) for all

single ended multiplexer conﬁgurations. The voltage on

CH0 to CH3 and COM pins can have any value between

GND – 0.3V to VCC + 0.3V. Within these limits, the two

selected inputs (IN+ and IN–) provide a bipolar input range

VIN = (IN

+ – IN–) from –0.5 • VREF/Gain to 0.5 • VREF/Gain.

Outside this input range, the converter produces unique

over-range and under-range output codes.

CH0 to CH3 (Pins 8-11): Analog Inputs. May be pro-

grammed for single-ended or differential mode.

VCC (Pin 12): Positive Supply Voltage. Bypass to GND with

a 10µF tantalum capacitor in parallel with a 0.1µF ceramic

capacitor as close to the part as possible.

REF+ (Pin 13), REF– (Pin 14): Differential Reference Input.

The voltage on these pins can have any value between

GND and VCC as long as the reference positive input,

REF+, remains more positive than the negative reference

input, REF–, by at least 0.1V. The differential voltage VREF

= (REF+ – REF–) sets the full-scale range (–0.5 • VREF/Gain

to 0.5 • VREF/Gain) for all input channels.

Exposed Pad (Pin 15): Ground. This pin is ground and

must be soldered to the PCB ground plane. For prototyping

purposes, this pin may remain ﬂoating.

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