поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

LXT386LE датащи(PDF) 39 Page - Intel Corporation

номер детали LXT386LE
подробное описание детали  QUAD T1/E1/J1 Transceiver
PDF  78 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  INTEL [Intel Corporation]
домашняя страница  http://www.intel.com
Logo INTEL - Intel Corporation

LXT386LE датащи(HTML) 39 Page - Intel Corporation

Back Button LXT386LE Datasheet HTML 35Page - Intel Corporation LXT386LE Datasheet HTML 36Page - Intel Corporation LXT386LE Datasheet HTML 37Page - Intel Corporation LXT386LE Datasheet HTML 38Page - Intel Corporation LXT386LE Datasheet HTML 39Page - Intel Corporation LXT386LE Datasheet HTML 40Page - Intel Corporation LXT386LE Datasheet HTML 41Page - Intel Corporation LXT386LE Datasheet HTML 42Page - Intel Corporation LXT386LE Datasheet HTML 43Page - Intel Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 39 / 78 page
background image
QUAD T1/E1/J1 Transceiver — LXT386
Datasheet
39
LOS Status Monitor
LOS
R
-
-
-
-
LOS3
LOS2
LOS1
LOS0
DFM Status Monitor
DFM
R
-
-
-
-
DFM3
DFM2
DFM1
DFM0
LOS Interrupt Enable
LIE
R/W
-
-
-
-
LIE3
LIE2
LIE1
LIE0
DFM Interrupt Enable
DIE
R/W
-
-
-
-
DIE3
DIE2
DIE1
DIE0
LOS Interrupt Status
LIS
R
-
-
-
-
LIS3
LIS2
LIS1
LIS0
DFM Interrupt Status
DIS
R
-
-
-
-
DIS3
DIS2
DIS1
DIS0
Software Reset
Register
RES
R/W
-
-
-
-
RES3
RES2
RES1
RES0
Performance
Monitoring
MON
R/W
reserve
d
reserve
d
reserve
d
reserve
d
A3
A2
A1
A0
Digital Loopback
DL
R/W
-
-
-
-
DL3
DL2
DL1
DL0
LOS/AIS Criteria Select
LACS
R/W
-
-
-
-
LACS3
LACS2
LACS1
LACS0
Automatic TAOS Select
ATS
R/W
-
-
-
-
ATS3
ATS2
ATS1
ATS0
Global Control Register
GCR
R/W
reserve
d
RAISE
N
CDIS
CODEN
FIFO64
JACF
JASEL1
JASEL0
Pulse Shaping Indirect
Address Register
PSIAD
R/W
reserve
d
reserve
d
reserve
d
reserve
d
reserve
d
LENAD2
LENAD1
LENAD0
Pulse Shaping Data
Register
PSDAT
R/W
reserve
d
reserve
d
reserve
d
reserve
d
reserve
d
LEN2
LEN1
LEN0
Output Enable Register
OER
R/W
-
-
-
-
OE3
OE2
OE1
OE0
AIS Status Register
AIS
R
-
-
-
-
AIS3
AIS2
AIS1
AIS0
AIS Interrupt Enable
AISIE
R/W
-
-
-
-
AISIE3
AISIE2
AISIE1
AISIE0
AIS Interrupt Status
AISIS
R
-
-
-
-
AISIS3
AISIS2
AISIS1
AISIS0
Table 8.
ID Register, ID (00H)
Bit
Name
Function
7-0
ID7-ID0
This register contains a unique revision code and is mask programmed.
For Revision A1, ID register = 00h
For Revision B1, ID register = 21h
For Revision B2, ID register = 22h
Table 9.
Analog Loopback Register, ALOOP (01H)
Bit
Name
Function
3-0
AL3-AL0
Setting a bit to “1” enables analog local loopback for transceivers 3- 0 respectively.
Table 7.
Register Bit Names (Continued)
Register
Bit
Name
Sym
RW
7
65
43
2
1
0



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com