LXT386LE datasheet(32/78 Pages) INTEL

32 / 78 page

LXT386 — QUAD T1/E1/J1 Transceiver

Datasheet

3.7.2

Digital Loopback

The digital loopback function is available in software and hardware mode. When selected, the

transmit clock and data inputs (TCLK, TPOS & TNEG) are looped back and output on the RCLK,

RPOS & RNEG pins (Figure 10). The data presented on TCLK, TPOS & TNEG is also output on

the TTIP & TRING pins. Note that signals on the RTIP & RRING pins are ignored during digital

loopback.

3.7.3

Remote Loopback

During remote loopback (Figure 11) the RCLK, RPOS & RNEG outputs routed to the transmit

circuits and output on the TTIP & TRING pins. Note that input signals on the TCLK, TPOS &

TNEG pins are ignored during remote loopback.

Note:

In data recovery mode, the pulse template cannot be guaranteed while in a remote loopback.

3.7.4

Transmit All Ones (TAOS)

In Hardware mode, the TAOS mode is set by pulling TCLK High for more than 16 MCLK cycles.

In software mode, TAOS mode is set by asserting the corresponding bit in the TAOS Register. In

addition, automatic ATS insertion (in case of LOS) may be set using the ATS Register.

Note: The TAOS generator uses MCLK as a timing reference, therefore TAOS doesn’t work in data

recovery mode. In order to assure that the output frequency is within specification limits, MCLK

must have the applicable stability. DLOOP does not function with TAOS active.

Figure 10. Digital Loopback

Timing &

Control

Timing

Recovery

TTIP

TRING

RTIP

RRING

RCLK

RPOS

RNEG

TCLK

TPOS

TNEG

* If Enabled

JA*

Figure 11. Remote Loopback