LXT386LE datasheet(3/78 Pages) INTEL

3 / 78 page

Datasheet

QUAD T1/E1/J1 Transceiver — LXT386

Contents

1.0

Features .........................................................................................................................7

2.0

Pin Assignments and Signal Description ........................................................9

3.0

Functional Description...........................................................................................22

3.1

Initialization.......................................................................................................... 22

3.1.1

Reset Operation ..................................................................................... 22

3.2

Receiver .............................................................................................................. 23

3.2.1

Loss of Signal Detector .......................................................................... 24

3.2.1.1 E1 Mode .................................................................................... 24

3.2.1.2 T1 Mode .................................................................................... 24

3.2.1.3 Data Recovery Mode................................................................. 24

3.2.2

Alarm Indication Signal (AIS) Detection ................................................. 24

3.2.2.1 E1 Mode .................................................................................... 25

3.2.2.2 T1 Mode .................................................................................... 25

3.2.3

In Service Code Violation Monitoring ..................................................... 25

3.3

Transmitter .......................................................................................................... 25

3.3.1

Transmit Pulse Shaping ......................................................................... 26

3.3.1.1 Hardware Mode ......................................................................... 26

3.3.1.2 Host Mode ................................................................................. 26

3.3.2

Transmit Pulse Shaping ......................................................................... 27

3.3.2.1 Output Driver Power Supply ...................................................... 27

3.3.2.2 Power Sequencing .................................................................... 27

3.4

Driver Failure Monitor.......................................................................................... 27

3.5

Line Protection .................................................................................................... 28

3.6

Jitter Attenuation ................................................................................................. 30

3.7

Loopbacks ........................................................................................................... 31

3.7.1

Analog Loopback.................................................................................... 31

3.7.2

Digital Loopback..................................................................................... 32

3.7.3

Remote Loopback ..................................................................................32

3.7.4

Transmit All Ones (TAOS)...................................................................... 32

3.8

G.772 Performance Monitoring ........................................................................... 33

3.9

Hitless Protection Switching (HPS) .....................................................................34

3.10

Operation Mode Summary ..................................................................................34

3.11

Interfacing with 5V logic ...................................................................................... 35

3.12

Parallel Host Interface .........................................................................................35

3.12.1 Motorola Interface ..................................................................................35

3.12.2 Intel Interface.......................................................................................... 36

3.13

Interrupt Handling................................................................................................ 36

3.13.1 Interrupt Enable ...................................................................................... 36

3.13.2 Interrupt Clear ........................................................................................ 37

3.14

Serial Host Mode................................................................................................. 37

4.0

5.0

JTAG Boundary Scan .............................................................................................45

5.1

Overview ............................................................................................................. 45

5.2

Architecture ......................................................................................................... 45

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