LXT386LE datasheet(14/78 Pages) INTEL

14 / 78 page

LXT386 — QUAD T1/E1/J1 Transceiver

Datasheet

TCLK0

Transmit Clock. During normal operation TCLK is active, and TPOS and

TNEG are sampled on the falling edge of TCLK. If TCLK is Low, the output

drivers enter a low power high Z mode. If TCLK is High for more than 16

clock cycles the pulse shaping circuit is disabled and the transmit output

pulse widths are determined by the TPOS and TNEG duty cycles.

When pulse shaping is disabled, it is possible to overheat and damage the

LXT384 device by leaving transmit inputs high continuously. For example

a programmable ASIC might leave all outputs high until it is programmed.

To prevent this, clock one of these signals: TPOS, TNEG, TCLK or MCLK.

Another solution is to set one of these signals low: TPOS, TNEG, TCLK,

or OE.

Note that the TAOS generator uses MCLK as a timing reference. In order

to assure that the output frequency is within specification limits, MCLK

must have the applicable stability.

TPOS0/

TDATA0

Transmit Positive Data.

Transmit Data.

Transmit Negative Data.

Unipolar/Bipolar Select.

Bipolar Mode:

TPOS/TNEG are active high NRZ inputs. TPOS indicates the transmission

of a positive pulse whereas TNEG indicates the transmission of a negative

pulse.

Unipolar Mode:

When TNEG/UBS is pulled High for more than 16 consecutive TCLK clock

cycles, unipolar I/O is selected. In unipolar mode, B8ZS/HDB3 or AMI

encoding/decoding is determined by the CODEN pin (hardware mode) or

by the CODEN bit in the GCR register (software mode).

TDATA is the data input in unipolar I/O mode.

TNEG0/

UBS0

Table 1.

Pin Assignments and Signal Descriptions (Continued)

Ball #

PBGA

Pin #

LQFP

Symbol

I/O1

Description

1. DI: Digital Input; DO: Digital Output; DI/O: Digital Bidirectional Port; AI: Analog Input; AO: Analog Output S: Power Supply;

N.C.: Not Connected.

2. N/C means “Not Connected”

TCLK

Operating Mode

Clocked

Normal operation

TAOS (if MCLK supplied)

Disable transmit pulse shaping (when

MCLK is not available)

Driver outputs enter tri-state

TPOS

TNEG

Selection

Space

Positive Mark

Negative Mark

Space

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