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CS5535 датащи(PDF) 280 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
номер детали CS5535
подробное описание детали  Geode??CS5535 I/O Companion Multi-Function South Bridge
PDF  555 Pages
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
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CS5535 датащи(HTML) 280 Page - National Semiconductor (TI)

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280
Revision 0.8
USB Register Descriptions (Continued)
5.5.4.5
Host Controller Interrupt Enable (USBC_HcInterruptEnable)
Writing a 1 to a bit in this register sets the corresponding bit, while writing a 0 leaves the bit unchanged.
USBC_HcInterruptStatus Register Map
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
98
7654321
0
RSVD
USBC_HcInterruptStatus Bit Descriptions
Bit
Name
HCD
HC
Description
31
RSVD
R/W
R/W
Reserved. Read/write 0s.
30
Ownership
Change
R/W
R/W
Ownership Change. This bit is set when the OwnershipChang-
eRequest bit of HcCommandStatus is set.
29:7
RSVD
R/W
R/W
Reserved. Read/write 0s.
6
RootHubStatus
Change
R/W
R/W
Root Hub Status Change. This bit is set when the content of
HcRhStatus or the content of any HcRhPortStatus register has
changed.
5
FrameNumber
Overflow
R/W
R/W
Frame Number Overflow. Set when bit 15 of FrameNumber
changes value.
4
Unrecoverable
Error
R/W
R/W
Unrecoverable Error (Read Only). This event is not imple-
mented and is hard-coded to 0. HCD clears this bit.
3
Resume
Detected
R/W
R/W
Resume Detected. Set when HC detects resume signaling on a
downstream port.
2
StartOfFrame
R/W
R/W
Start Of Frame. Set when the Frame Management block signals
a Start of Frame event.
1
WritebackDone
Head
R/W
R/W
Writeback Done Head. Set after the HC has written HcDone-
Head.
0
Scheduling
Overrun
R/W
R/W
Scheduling Overrun. Set when the List Processor determines a
Schedule Overrun has occurred.
USB Memory Offset
10h
Type
HCD:
HC:
R/W
RO
Reset Value
00000000h



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