AD5384BBC-5 datasheet(32/36 Pages) AD

32 / 36 page

AD5384

Rev. A | Page 32 of 36

APPLICATION INFORMATION

POWER SUPPLY DECOUPLING

In any circuit where accuracy is important, careful considera-

tion of the power supply and ground return layout helps to

ensure the rated performance. The printed circuit board on

which the AD5384 is mounted should be designed so that the

analog and digital sections are separated and confined to

certain areas of the board. If the AD5384 is in a system where

multiple devices require an AGND-to-DGND connection, the

connection should be made at one point only, a star ground

point established as close to the device as possible.

For supplies with multiple pins (AVDD, AVCC), these pins should

be tied together. The AD5384 should have ample supply bypass-

ing of 10 µF in parallel with 0.1 µF on each supply, located as

close to the package as possible and ideally right up against the

device. The 10 µF capacitors are the tantalum bead type. The

0.1 µF capacitor should have low effective series resistance

(ESR) and effective series inductance (ESI), like the common

ceramic types that provide a low impedance path to ground at

high frequencies, to handle transient currents due to internal

logic switching.

The power supply lines of the AD5384 should use as large a

trace as possible to provide low impedance paths and reduce the

effects of glitches on the power supply line. Fast switching

signals, such as clocks, should be shielded with digital ground

to avoid radiating noise to other parts of the board, and should

never be run near the reference inputs. A ground line routed

between the DIN and SCLK lines helps to reduce crosstalk

between them (this is not required on a multilayer board

because there is a separate ground plane, but separating the

lines helps). It is essential to minimize noise on the VIN and

REFIN lines.

Avoid crossover of digital and analog signals. Traces on

opposite sides of the board should run at right angles to each

other. This reduces the effects of feedthrough through the

board. A microstrip technique is by far the best, but is not

always possible with a double-sided board. In this technique,

the component side of the board is dedicated to the ground

plane while signal traces are placed on the solder side.

MONITOR FUNCTION

The AD5384 contains a channel monitor function that consists

of a multiplexer addressed via the interface, allowing any

channel output to be routed to this pin for monitoring using an

external ADC. In channel monitor mode, VOUT39 becomes

the MON_OUT pin, to which all monitored signals are routed.

The channel monitor function must be enabled in the control

the decoding information required to route any channel to

MON_OUT. Selecting Channel Address 63 three-states

MON_OUT. Figure 36 shows a typical monitoring circuit

implemented using a 12-bit SAR ADC in a 6-lead SOT package.

The controller output port selects the channel to be monitored,

and the input port reads the converted data from the ADC.

AD7476

GND

SDATA

SCLK

AVCC

VIN

VOUT39/MON_OUT

AGND

DIN

SYNC

SCLK

DAC_GND SIGNAL_GND

VOUT0

VOUT38

AVCC

AD5384

OUTPUT PORT

INPUT PORT

CONTROLLER

Figure 36. Typical Channel Monitoring Circuit

TOGGLE MODE FUNCTION

The toggle mode function allows an output signal to be gener-

ated using the LDAC control signal, which switches between

two DAC data registers. This function is configured using the

SFR control register as follows. A write with REG1 = REG0 = 0

and A5–A0 = 001100 specifies a control register write. The

toggle mode function is enabled in groups of eight channels

using Bits CR6 to CR2 in the control register (see Table 17).

Figure 37 shows a block diagram of toggle mode

implementation.

14-BIT DAC

DAC

INPUT

DATA

INPUT

DATA

A/B

VOUT

LDAC

CONTROL INPUT

Figure 37. Toggle Mode Function

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