ADIS16203SLASHPCBZ datasheet(15/28 Pages) AD

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ADIS16203

Rev. 0 | Page 15 of 28

CONTROL REGISTER DETAILS

All ADIS16203 control registers are organized into 2-byte segments,

and both upper (Bit 8 to Bit 15) and lower (Bit 0 to Bit 7) bytes have

unique addresses and can be accessed individually.

MSB

LSB

D15

D14

D13

D12

D11

D10

This section provides a description of each register, including its

purpose, relevant scaling information, bit maps, addresses, and

default values.

CALIBRATION

In addition to the factory calibration, the ADIS16203 provides

two user calibration options. Both options utilize the INCL_NULL

control register, which provides an add function to the two incline-

angle output registers: INCL_OUT and INCL_180_OUT. Because

the default contents of INCL_NULL are 0, adding it to these two

outputs has no effect on the output data.

The first calibration option is an automatic null function. This function

measures the contents of INCL_OUT and then writes the inverse of

this value into the INCL_NULL control register. The accuracy of this

calibration is dependent on the stability of the INCL_OUT measure-

ment; therefore, maximizing the filtering will minimize the errors

associated with noise. Table 9 displays a sequence that executes the

automatic null.

Table 9. Automatic Null Sequence

Step

Description

Write 0x08 to Address 0x38

Sets averaging count to 256

using the AVG_CNT register

Wait for 512 samples

Waits for the lowest noise data

Write 0x01 to Address 0x3E

Executes the global autonull

function using the COMMAND

Restore previous average count

Increasing the sample rate using the SMPL_TIME control register

will minimize the waiting time if this parameter is critical.

The second option for system-level calibration is manual adjustment.

The INCL_NULL control register can be updated using write com-

mands. Refer to its definition in the INCL_NULL Register Definition

section for details.

The factory calibration can be restored by writing 0x02 to Register

Address 0x3E. This restores INCL_NULL to 0.

CALIBRATION REGISTER DEFINITION

INCL_NULL Register Definition

Address

Scale1

Default

Format

Access

0x19, 0x18

0.025°

0x0000

Binary

R/W

1 Scale is the weight of each LSB.

The INCL_NULL register is the user controlled register for

calibrating system-level inclination offset errors. The maximum

calibration range is +0° to +359.975° or 0 to +14,399 decimal

codes. The contents of this register are nonvolatile.

Table 10. INCL_NULL Bit Designations

Bit

Description

15:14

Not necessary, force to 0

13:0

Data bits

ALARMS

The ADIS16203 contains two independent alarm functions that

are referred to as Alarm 1 and Alarm 2. The Alarm 1 function is

managed by the ALM_MAG1 and ALM_SMPL1 control registers.

The Alarm 2 function is managed by the ALM_MAG2 and

ALM_SMPL2 control registers. Both the Alarm 1 and Alarm 2

functions share the ALM_CTRL register. For simplicity, this

section refers to the Alarm 1 functionality only.

The 16-bit ALM_CTRL register serves several roles in controlling

the Alarm 1 function. First, it is used to enable the overall Alarm 1

function and to select the output data variable that is to be

monitored for the alarm condition. Second, it is used to select

whether the Alarm 1 function is based upon a predefined threshold

(THR) level or a predefined rate-of-change (ROC) slope. Third,

the ALM_CTRL register can be used in setting up one of the

two general-purpose input/output lines (GPIOs) to serve as a

hardware output that indicates when an alarm condition has

occurred. Enabling the I/O alarm function as well as setting its

polarity and controlling its operation are accomplished using

this register. Fourth, this register provides the controls for

setting the comparison data as filtered or unfiltered.

Note that when enabled, the hardware output indicator serves

both the Alarm 1 and Alarm 2 functions and cannot be used to

differentiate between one alarm condition and the other. It is

simply used to indicate that an alarm is active and that the user

should poll the device via the SPI to determine the source of the

alarm condition (see the STATUS Register Definition section).

Because the ALM_CTRL, MSC_CTRL, and GPIO_CTRL

control registers can influence the same GPIO pins, a priority

level has been established to avoid conflicting assignments of

the two GPIO pins. This priority level is defined as MSC_CTRL,

which has precedence over ALM_CTRL, which has precedence

over GPIO_CTRL.

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