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ADIS16203/PCBZ датащи(PDF) 14 Page - Analog Devices |
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ADIS16203/PCBZ датащи(HTML) 14 Page - Analog Devices |
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14 / 28 page ![]() ADIS16203 Rev. 0 | Page 14 of 28 PROGRAMMING AND CONTROL CONTROL REGISTER OVERVIEW The ADIS16203 offers many programmable features that are controlled by writing commands to the appropriate control registers using the SPI. For added system flexibility and programmability, the following sections describe these controls and specify each register’s configuration. A list of features that are available for configuration in this register space follows: • Calibration: Automatic offset null, manual offset adjustment, factory reset • Rotational direction: clockwise or counter-clockwise • Sample rate adjustment • Filter response optimization • Alarm settings: threshold or rate of change, and comparison with filtered or unfiltered data • I/O configuration: data ready, etc. • Power management: sleep mode, normal and high performance modes • Auxiliary DAC level setting • Status checks: verify power supply, SPI communication, package orientation • Flash™ updates to store configuration CONTROL REGISTER ACCESS Table 8 displays the control register map for the ADIS16203, including address, volatile status, basic function, and accessibility (read/write). The following sections contain detailed descriptions and configurations for each of these registers. The ADIS16203 is a Flash-based device with the nonvolatile functional registers implemented as Flash registers. Take into account the endurance limitation of 20,000 writes when consid- ering the system-level integration of these devices. The nonvolatile column in Table 8 indicates the registers that are recovered on power- up. The user must use a manual Flash update command (using the command register) to store the nonvolatile data registers once they are configured properly. When performing a manual Flash update command, the user needs to ensure that the power supply remains within limits for a minimum of 50 ms after the start of the update. This ensures a successful write of the nonvolatile data. Table 8. Control Register Mapping Register Name Type Nonvolatile Address Bytes Function 0x00 to 0x01 2 Reserved INCL_NULL R/W X 0x18 2 Incline null calibration ALM_MAG1 R/W X 0x20 2 Alarm 1 amplitude threshold ALM_MAG2 R/W X 0x22 2 Alarm 2 amplitude threshold ALM_SMPL1 R/W X 0x24 2 Alarm 1 sample period ALM_SMPL2 R/W X 0x26 2 Alarm 2 sample period ALM_CTRL R/W X 0x28 2 Alarm source control register 0x2A to 0x2F 6 Reserved AUX_DAC R/W 0x30 2 Auxiliary DAC data GPIO_CTRL R/W 0x32 2 Auxiliary digital I/O control register MSC_CTRL R/W X 0x34 2 Miscellaneous control register SMPL_TIME R/W X 0x36 2 ADC sample period control AVG_CNT R/W X 0x38 2 Defines number of samples used by moving average filter SLP_CNT R/W 0x3A 2 Counter used to determine length of power-down mode STATUS R 0x3C 2 System status register COMMAND W 0x3E 2 System command register |
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