ZAMC4100GA2R datasheet(10/156 Pages) RENESAS

10 / 156 page

ZAMC4100 Datasheet

January 26, 2016

Figure 3.10

SPI Frames...................................................................................................................................... 56

Figure 3.11

SPI Single or Burst Access.............................................................................................................. 57

Figure 3.12

Structure of the Half-Bridge Drivers................................................................................................. 59

Figure 3.13

Operation Principle of Over-Current Counter Integrator .................................................................. 62

Figure 3.14

Structure of High-Side Drivers ......................................................................................................... 65

Figure 3.15

PWM Block Diagram........................................................................................................................ 68

Figure 3.16

PWM Output Signal ......................................................................................................................... 69

Figure 3.17

Recommended PWM Initialization Procedure with HS3 as an Example ......................................... 71

Figure 3.18

Effect of Driver Enable When the PWM is Running......................................................................... 72

Figure 3.19

ECM Driver Structure....................................................................................................................... 73

Figure 3.20

ADC Functional Diagram ................................................................................................................. 78

Figure 3.21

Ratiometric versus Absolute Measurement Inputs Configuration.................................................... 79

Figure 3.22

Using AIN3 and AIN4 for External Temperature Measurement....................................................... 80

Figure 3.23

Pipelined Measurement and Results Reading for the Driver Current.............................................. 89

Figure 3.24

ADC Result Formatting Options ...................................................................................................... 90

Figure 3.25

ADC Analog Inputs Protection and Open/Short Detection Circuitry ................................................ 92

Figure 3.26

LIN PHY Block Diagram .................................................................................................................. 95

Figure 3.27

LIN Wake-up Detection Depending on the Value of the LINWUMD Bit........................................... 96

Figure 3.28

SBC Register File Organization....................................................................................................... 99

Figure 3.29

Structure of SBC Trimming Data ................................................................................................... 102

Figure 4.1

Structure of FLASH Memory and Page Details ............................................................................. 105

Figure 4.2

Example of RAMSPLIT Address Configuration ............................................................................. 108

Figure 4.3

RESET and CLOCK between SBC and MCU ............................................................................... 109

Figure 4.4

MCU Interrupt Logic Organization ................................................................................................. 110

Figure 4.5

Master SPI Block Diagram............................................................................................................. 114

Figure 4.6

SW-LIN Block Diagram.................................................................................................................. 117

Figure 4.7

Structure of LIN Frame .................................................................................................................. 118

Figure 4.8

Block Diagram of the LIN Data Unit............................................................................................... 118

Figure 4.9

Frame Format of Each LIN Field (PID, DATA, Checksum) and RX Sample Position ................... 119

Figure 4.10

RX Control and Status Signal Waveforms..................................................................................... 120

Figure 4.11

Waveforms of the TX and RX Control and Status Signals ............................................................ 121

Figure 6.1

ZAMC4100 Application Circuit for Automotive Mirror Control........................................................ 146

Figure 7.1

ZAMC4100 Multi-chip-Module Assembly....................................................................................... 148

Figure 7.2

Pin Layout for ZAMC4100 PQFN65 – Top View ........................................................................... 148

Figure 8.1

ZAMC4100 Package Dimensions – Plastic QFN64....................................................................... 152

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