AD9980PCB datasheet(37/44 Pages) AD

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AD9980

Rev. 0 | Page 37 of 44

0x25

Vsync0 Polarity

Indicates the polarity of Vsync0 input.

Table 70. Detected Vsync0 Polarity Results

Detect

Result

Vsync polarity is negative

Vsync polarity is positive

0x25

Vsync1 Polarity

Indicates the polarity of Vsync1 input.

Table 71. Detected Vsync1 Polarity Results

Detect

Result

Vsync polarity is negative

Vsync polarity is positive

0x25

Coast Polarity

Indicates the polarity of the external Coast signal.

Table 72. Detected Coast Polarity Results

Detect

Result

Coast polarity is negative

Coast polarity is positive

0x25

Clamp Polarity

Indicates the polarity of the clamp signal.

Table 73. Detected Clamp Polarity Results

Detect

Result

Clamp polarity is negative

Clamp polarity is positive

0x25

Extraneous Pulses Detection

A second output from the Hsync filter, this status bit tells

whether extraneous pulses are present on the incoming sync

signal. Often extraneous pulses are used for copy protection, so

this status bit can be used for this purpose.

Table 74. Equalization Pulse Detect Bit

Detect

Result

No equalization pulses detected during

active Hsync

Equalization pulses detected during

active Hsync

HSYNC COUNT

0x26

7:0

Hsyncs/Vsync MSB

The 8 MSBs of the 12-bit counter that reports the

number of Hsyncs/Vsync on the active input. This is

useful for determining the mode and is an aid in

setting the PLL divide ratio.

0x27

7:4

Hsyncs/Vsync LSBs

The 4 LSBs of the 12-bit counter that reports the

number of Hsyncs/Vsync on the active input.

Test Registers

0x28

7:0

Test Register 1

Must be written to 0xBF for proper operation.

0x29

7:0

Test Register 2

Must be written to 0x00 for proper operation.

0x2A

7:0

Test Register 3

Read only bits for future use.

0x2B

7:0

Test Register 4

Read only bits for future use.

0x2C

7:5

Must be written to 000 for proper operation.

0x2C

Auto-Offset Hold

A bit for controlling whether the auto-offset function

runs continuously or runs once and holds the result.

Continuous updates are recommended because it

allows the AD9980 to compensate for drift-over time,

temperature, etc. If one-time updates are preferred,

these should be performed every time the part is

powered up and when there is a mode change. To do a

one-time update, first auto-offset must be enabled

(Register 0x1B, Bit 5). Next, this bit (auto-offset hold)

must first be set to 0 to let the auto-offset function

operate and settle to a final value. Auto-offset hold

should then be set to 1 to hold the offset values that

the auto circuitry calculates. The AD9980’s auto-offset

circuit’s maximum settle time is 10 updates. For

example, if the update frequency is set to once every

64 Hsyncs, then the maximum settling time would be

640 Hsyncs (10 × 64 Hsyncs).

Table 75. Auto-Offset Hold

Select

Result

Allows auto-offset to update continuously

Disables auto-offset updates and holds the

current auto-offset values

0x2C

3:0

Must be written to 0x0 for proper operation.

0x2D

7:0

Test Register 5

Read/write bits for future use. Must be written to

0xE8 for proper operation.

0x2E

7:0

Test Register 6

Read/write bits for future use. Must be written to

0xE0 for proper operation.

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