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© Integrated Device Technology, Inc

December 2, 2015

843034 DATA SHEET

Power Considerations

This section provides information on power dissipation and junction temperature for the 843034.

Equations and example calculations are also provided.

1.

Power Dissipation.

The total power dissipation for the 843034 is the sum of the core power plus the power dissipated due to loading.

The following is the power dissipation for VCC = 3.465V, which gives worst case results.

NOTE: Please refer to Section 3 for details on calculating power dissipated due to loading.

Core and LVPECL Output Power Dissipation

•

Power (core)MAX = VCC_MAX * IEE_MAX = 3.465V * 188mA = 651.42mW

•

Power (outputs)MAX = 30mW/Loaded Output pair

If all outputs are loaded, the total power is 2 * 32.6mW = 65.2mW

LVCMOS Output Power Dissipation

•

Output Impedance ROUT Power Dissipation due to Loading 50 to VCCO_REF/2

Output Current IOUT = VCCO_REF / [2 * (50 + ROUT)] = 3.465V / [2 * (50 + 12)] = 27.94mA

Power (REF_OUT) = ROUT * (IOUT)

2 = 12

 * (27.94mA)2 = 9.37mW per output

Total Power Dissipation

•

Total Power

= Power (core)MAX + Power(LVPECL outputs)MAX + Power (REF_OUT)

= 651.42mW + 65.2mW + 9.37mW

= 725.99mW

2. Junction Temperature.

Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The

maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond

wire and bond pad temperature remains below 125°C.

The equation for Tj is as follows: Tj =



JA * Pd_total + TA

Tj = Junction Temperature



JA = Junction-to-Ambient Thermal Resistance

Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)

TA = Ambient Temperature

In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance



JA must be used. Assuming no air flow and

a multi-layer board, the appropriate value is 65.7°C/W per Table 8 below.

Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:

70°C + 0.726W * 65.7°C/W = 117.7°C. This is below the limit of 125°C.

This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of

board (multi-layer).

Table 8. Thermal Resistance



JA for 48-Lead LQFP Forced Convection



JA by Velocity

Meters per Second

01

2.5

Multi-Layer PCB, JEDEC Standard Test Boards

65.7°C/W

55.9°C/W

52.4°C/W