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© Integrated Device Technology, Inc

December 2, 2015

843034 DATA SHEET

Revision History Sheet

Rev

Table

Page

Description of Change

Date

B

T1

T3

T3B

T3C

T3F

T4A

T4B

T5

T6

T7A, T7B

1

1

2

4

5

6

7

8

9

9

10

10

11 - 12

14 - 15

16

17

18

22 - 23

24

Corrected General Description: changed reference clock to test clock; and changed

REF_CLK to REF_OUT. Deleted last paragraph.

Features: corrected Supply Voltage bullet from REF_CLK output to REF_OUT output.

Block Diagram - swapped SEL1 and SEL0 pins; changed REF_CLK to TEST_CLK.

Pin Description Table - Pin 5, corrected description to read REF_OUT from REF_CLK;

Pin 21, corrected pin name from REF_CLK to REF_OUT.

Pin Characteristics Table - CIN row, added Clock Input Pin row; ROUT row, corrected pin

name from REF_CLK to REF_OUT.

Programmable VCO Frequency Function Table - deleted blank rows. changed VCO

Frequency from 700 to 600 and M Divide from 28 to 24 (updated row for M2 column);

changed VCO Frequency from 750 to 625 and M Divide from 30 to 25 (updated rows for

M2:M1 columns).

Programmable Output Divider Function Table - corrected Output Frequency Maximum

column.

SEL0, SEL1 Function Table - corrected Headings, changed from SEL 0 / SEL1 to

SEL 1 /SEL0 Input Column - swapped 2nd and 3rd rows.

Power Supply DC Characteristics Table - changed VCCO_REF test condition from REF_CLK

to REF_OUT.

LVCMOS DC Characteristic Table - VOH/ VOL rows - changed REF_CLK to REF_OUT.

Input Frequency Characteristics Table - fIN parameter - deleted S_CLOCK row; deleted

Rise/Fall Time parameters.

Crystal Characteristics - added Load Capacitance parameter.

AC Characteristic Tables - Output Rise/Fall Time, changed REF_CLK to REF_OUT; Output

Duty Cycle parameter - changed specs from 40% - 60% to 35% - 65%; PLL Lock Time

parameter - change spec from 100ms to 200ms; Note 2 changed REF_CLK to REF_OUT.

Parameter Measurement Information - corrected 3.3V/2.5V LVPECL Output Load Test

Circuit Diagram. Added differential Input Levels, RMS Phase Jitter, Cycle-to-Cycle Jitter and

PLL Lock Time diagrams. LVCMOS Output Rise/Fall Time diagram corrected label from

changed REF_CLK to REF_OUT

Applications Section -

Recommendations for Unused Input & Output Pins - added CLK, nCLK input section and

changed Output section.

Updated Wiring the Differential Input to Accept Single-Ended Levels.

Updated Wiring the Differential Input to Accept Single-Ended Levels.

Updated Schematic Application Note.

Power Considerations, corrected LVCMOS Output Power Dissipation and calculation.

11/6/13

B

F1

T3B

T3C

1

3

3

3

6

6

Features: Changed VCO range from 625MHz to 750MHz.

Functional Description, 2nd paragraph: Changed VCO range from 625MHz to 750MHz.

Functional Description, 5th paragraph: Changed 23

M 25 to 23 M 30.

Replaced Figure 1.

Updated Table for VCO Frequencies 700MHz, 750MHz.

Updated Output Frequency Maximum column.

2/5/2014

B

Updated data sheet format

12/2/15