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ICS843034 датащи(PDF) 22 Page - Renesas Technology Corp |
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ICS843034 датащи(HTML) 22 Page - Renesas Technology Corp |
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22 / 31 page ![]() 22 © Integrated Device Technology, Inc December 2, 2015 843034 DATA SHEET Application Schematic Example Figure 7 (next page) shows an example of 843034 application schematic. In this example, the device is operated at VCC = VCCO_A = VCCO_B = VCCO_REF = 3.3V. An 18pF parallel resonant 25MHz crystal is used. The load capacitance C1 = 18pF and C2 = 22pF are recommended for frequency accuracy. Depending on the parasitics of the printed circuit board layout, these values might required slight adjustment to optimize the frequency accuracy. Crystals with other load capacitance specifications can be used. This will require adjusting C1 and C2. For this device, the crystal load capacitors are required for proper operation. As with any high speed analog circuitry, the power supply pins are vulnerable to noise. To achieve optimum jitter performance, power supply isolation is required. The 843034 provides separate power supplies to isolate to isolate any high switching noise from coupling into the internal PLL. In order to achieve the best possible filtering, it is recommended that the placement of the filter components be on the device side of the PCB as close to the power pins as possible. If space is limited, the 0.1uF capacitor in each power pin filter should be placed on the device side. The other components can be on the opposite side of the PCB. Power supply filter recommendations are a general guideline to be used for reducing external noise from coupling into the devices. The filter performance is designed for a wide range of noise frequencies. This low-pass filter starts to attenuate noise at approximately 10kHz. If a specific frequency noise component with high amplitude interference is known, such as switching power supplies frequencies, it is recommended that component values be adjusted and if required, additional filtering be added. Additionally general design practice for power plane voltage stability suggests adding bulk capacitances in the general area of all devices. The schematic example focuses on functional connections and is not configuration specific. Refer to the pin description and functional tables in the datasheet to ensure the logic control inputs are properly set. |
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