DSPIC30F datasheet(41/248 Pages) MICROCHIP

41 / 248 page

 2004 Microchip Technology Inc.

Preliminary

DS70083G-page 39

dsPIC30F

FIGURE 3-5:

SAMPLE PROGRAM

SPACE MEMORY MAP

3.2

Data Address Space

The core has two data spaces. The data spaces can be

considered either separate (for some DSP instruc-

tions), or as one unified linear address range (for MCU

instructions). The data spaces are accessed using two

Address Generation Units (AGUs) and separate data

paths.

3.2.1

DATA SPACES

The X data space is used by all instructions and sup-

ports all Addressing modes. There are separate read

and write data buses. The X read data bus is the return

data path for all instructions that view data space as

combined X and Y address space. It is also the X

address space data path for the dual operand read

instructions (MAC class). The X write data bus is the

only write path to data space for all instructions.

The X data space also supports modulo addressing for

all instructions, subject to Addressing mode restric-

tions. Bit-reversed addressing is only supported for

writes to X data space.

The Y data space is used in concert with the X data

space by the

MAC class of instructions (CLR, ED,

EDAC,

MAC,

MOVSAC,

MPY,

MPY.N

and MSC) to

provide two concurrent data read paths. No writes

occur across the Y bus. This class of instructions dedi-

cates two W register pointers, W10 and W11, to always

address Y data space, independent of X data space,

whereas W8 and W9 always address X data space.

Note that during accumulator write back, the data

address space is considered a combination of X and Y

data spaces, so the write occurs across the X bus.

Consequently, the write can be to any address in the

entire data space.

The Y data space can only be used for the data pre-

fetch operation associated with the MAC class of

instructions. It also supports modulo addressing for

automated circular buffers. Of course, all other instruc-

tions can access the Y data address space through the

X data path as part of the composite linear space.

The boundary between the X and Y data spaces is

defined as shown in Figure 3-8 and is not user pro-

grammable. Should an EA point to data outside its own

assigned address space, or to a location outside phys-

ical memory, an all zero word/byte will be returned. For

example, although Y address space is visible by all

non-MAC instructions using any Addressing mode, an

attempt by a MAC instruction to fetch data from that

space using W8 or W9 (X space pointers) will return

0x0000

Reset - Target Address

000000

00007E

000002

000080

Device Configuration

User Flash

Program Memory

018000

017FFE

Data EEPROM

(48K instructions)

(4 Kbytes)

800000

F80000

Registers

F8000E

F80010

DEVID (2)

FEFFFE

FF0000

FFFFFE

Reserved

F7FFFE

Reserved

7FF000

7FEFFE

(Read ‘0’s)

8005FE

800600

UNITID (32 instr.)

Vector Tables

8005BE

8005C0

Reset - GOTO Instruction

000004

Reserved

7FFFFE

Reserved

000100

0000FE

000084

Alternate Vector Table

Reserved

Interrupt Vector Table

Note: These address boundaries may vary from one

device to another.

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