SW52212 datasheet(30/71 Pages) SILABS

30 / 71 page

8.4 Block Write

After the slave address is sent with the R/W condition bit not set, the command byte is sent with the MSB = 0. The lower seven bits

indicate the register at which to start the transfer. If the command byte is 00h, the slave device will be compatible with existing block

mode slave devices. The next byte of a block write must be the count of bytes that the master will transfer to the slave device. The byte

count must be greater than zero and less than 7. Following this byte are the data bytes to be transferred to the slave device. The slave

device always acknowledges each byte received. The transfer is terminated after the slave sends the Ack and the master sends a stop

function.

Slave Address

Command

Command bit

starT

Condition

Block Write Protocol

Acknowledge

write

MSB = 0

1 1

Master to

Slave to

Data Byte 0 A Data Byte 1 A P

1 1

stoP Condition

Byte Count = 2 A

Figure 8.2. Block Write Protocol

8.5 Byte Read/Write

Reading or writing a register in an I2C slave device in byte mode always involves specifying the register number. Refer to Table

8.3 Byte Read and Byte Write Protocol on page 33 for byte read and byte write protocol.

8.6 Byte Read

The standard byte read is as shown in the figure below. It is an extension of the byte write. The write start condition is repeated; then,

the slave device starts sending data, and the master acknowledges it until the last byte is sent. The master terminates the transfer with

a NAK, then a stop condition. For byte operation, the MSB bit of the command byte must be set. For block operations, the MSB bit must

be set low. If the bit is not set low, the next byte must be the byte transfer count.

Slave

A Command

Slave

Data Byte 0

N P

A r

Command

starT

Condition

Byte Read Protocol

Acknowledge

repeat starT

Not ack

stoP

Condition

read

MSB bit = 1

1 1

Master to

Slave to

Figure 8.3. Byte Read Protocol

Data Sheet

Control Registers

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