SW52212 datasheet(14/71 Pages) SILABS

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Table 4.3. AC Electrical Specifications

Parameter

Symbol

Condition

Min

Typ

Max

Unit

Clock Input

CLKIN Frequency

—

MHz

CLKIN Duty Cycle

TDC

Measured at VDD/2

—

CLKIN Rising and Falling

Slew Rate

TR/TF

Measured between 0.2 VDD and

0.8 VDD

0.5

—

V/ns

Input High Voltage

VIH

XIN/CLKIN pin

0.75 VDD

—

Input Low Voltage

VIL

XIN/CLKIN pin

—

0.25 VDD

Input Common Mode

VCOM

Common mode input voltage

300

—

1000

Input Amplitude

VSWING

Peak to Peak value

300

—

1450

Control Input Pins

Trise

Rise time of single-ended control

inputs

—

Tfall

Fall time of single-ended control

inputs

—

SDATA, SCLK Rise Time

TrI2C

(Max VIL – 0.15) to

(Min VIH + 0.15)

—

1000

SDATA, SCLK Fall Time

TfI2C

(Min VIH + 0.15) to

(Max VIL – 0.15)

—

300

I2C Operating

Frequency

FmaxI2C

Maximum I2C operating

frequency

—

400

kHz

LVCMOS – REF (VDD = 1.5 V ±5%)

Long Accuracy

ppm

Variation from reference

frequency

ppm

Clock Period

TPERIOD

25 MHz output

—

Slew Rate

Trf

Byte 2[1:0] = 48 (Slowest), 20% to

80% of VDDREF

—

0.5

1.0

V/ns

Byte 2[1:0] = 49 (Slow), 20% to

80% of VDDREF

—

0.7

1.3

V/ns

Byte 2[1:0] = 4A (Fast), 20% to

80% of VDDREF

—

0.9

1.5

V/ns

Byte 2[1:0] = 4B (Fastest), 20% to

80% of VDDREF

—

0.9

1.6

V/ns

Duty Cycle1

TDC_REF

VT = VDD/2 V

Cycle-to-Cycle Jitter

TCCJ_REF

VT = VDD/2 V using "SLOW" Set-

ting

—

Phase Jitter

RMSREF

12 kHz to 5 MHz

—

0.35

0.45

REF Noise Floor

TJ1kHz_REF

1 kHz offset

—

–132

–124

dBc/Hz

REF Noise Floor

TJ10kHz_REF

10 kHz offset to Nyquist

—

–145

–138

dBc/Hz

Data Sheet

Electrical Specifications

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