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SW52212 датащи(PDF) 47 Page - Silicon Laboratories |
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SW52212 датащи(HTML) 47 Page - Silicon Laboratories |
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47 / 71 page ![]() Pin # Name Type Description 13 VSSR GND Ground. 14 SDA I/O I2C compatible SDATA. 15 SCLK I I2C compatible SCLOCK. 16 FS I Frequency select pin. 0 = 100 MHz, mid = 200 MHz, 1 = 133 MHz. (This pin has an internal 100 kΩ pull-down.) 17 DIFF_0 O, DIF 0.7 V, 100 MHz differential clock. 18 DIFF_0b O, DIF 0.7 V, 100 MHz differential clock. 19 OE_0b I, PD Output enable for DIFF_0 pair. (This pin has an internal 100 kΩ pull-down.) 0 = En- able outputs; 1 = Disable outputs. 20 OE_1b I, PD Output enable for DIFF_1 pair. (This pin has an internal 100 kΩ pull-down.) 0 = En- able outputs; 1 = Disable outputs. 21 DIFF_1 O, DIF 0.7 V, 100 MHz differential clock. 22 DIFF_1b O, DIF 0.7 V, 100 MHz differential clock. 23 GND GND Ground. 24 VDD PWR Power supply. 25 VDD_IO PWR Output power supply. 26 DIFF_2 O, DIF 0.7 V, 100 MHz differential clock. 27 DIFF_2b O, DIF 0.7 V, 100 MHz differential clock. 28 OE_2b I, PD Output enable for DIFF_2 pair (This pin has an internal 100 kΩ pull-down). 0 = En- able outputs; 1 = Disable outputs. 29 OE_3b I, PD Output enable for DIFF_3 pair (This pin has an internal 100 kΩ pull-down). 0 = En- able outputs; 1 = Disable outputs. 30 DIFF_3 O, DIF 0.7 V, 100 MHz differential clock. 31 DIFF_3b O, DIF 0.7 V, 100 MHz differential clock. 32 VDD_IO PWR Output power supply. 33 GND GND Ground. 34 DIFF_4 O, DIF 0.7 V, 100 MHz differential clock. 35 DIFF_4b O, DIF 0.7 V, 100 MHz differential clock. 36 OE_4b I, PD Output enable for DIFF_4 pair (This pin has an internal 100 kΩ pull-down). 0 = En- able outputs; 1 = Disable outputs. 37 OE_5b I, PD Output enable for DIFF_5 pair (This pin has an internal 100 kΩ pull-down). 0 = En- able outputs; 1 = Disable outputs. 38 DIFF_5 O, DIF 0.7 V, 100 MHz differential clock. 39 DIFF_5b O, DIF 0.7 V, 100 MHz differential clock. 40 VDD PWR Power supply. 41 GND GND Ground. 42 DIFF_6 O, DIF 0.7 V, 100 MHz differential clock. 43 DIFF_6b O, DIF 0.7 V, 100 MHz differential clock. 44 OE_6b I, PD Output enable for DIFF_6 pair (This pin has an internal 100 kΩ pull-down). 0 = En- able outputs; 1 = Disable outputs. Data Sheet Pin Descriptions silabs.com | Building a more connected world. Rev. 1.0 | 47 |
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