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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ST7LUS5 датащи(PDF) 23 Page - STMicroelectronics |
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ST7LUS5 датащи(HTML) 23 Page - STMicroelectronics |
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23 / 124 page  ST7LUS5, ST7LU05, ST7LU09 Central processing unit 23/124 5 Central processing unit 5.1 Introduction This CPU has a full 8-bit architecture and contains six internal registers allowing efficient 8- bit data manipulation. 5.2 Main features ● 63 basic instructions ● Fast 8-bit by 8-bit multiply ● 17 main addressing modes ● Two 8-bit index registers ● 16-bit stack pointer ● Low power modes ● Maskable hardware interrupts ● Non-maskable software interrupt 5.3 CPU registers The six CPU registers shown in Figure 6 are not present in the memory mapping and are accessed by specific instructions. 5.3.1 Accumulator (A) The Accumulator is an 8-bit general purpose register used to hold operands and the results of the arithmetic and logic calculations and to manipulate data. 5.3.2 Index registers (X and Y) In indexed addressing modes, these 8-bit registers are used to create either effective addresses or temporary storage areas for data manipulation (the Cross-Assembler generates a precede instruction (PRE) to indicate that the following instruction refers to the Y register). The Y register is not affected by the interrupt automatic procedures (not pushed to and popped from the stack). 5.3.3 Program counter (PC) The program counter is a 16-bit register containing the address of the next instruction to be executed by the CPU. It is made of two 8-bit registers PCL (Program Counter Low which is the LSB) and PCH (Program Counter High which is the MSB). |
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