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NAND04GR3B датащи(PDF) 34 Page - STMicroelectronics |
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NAND04GR3B датащи(HTML) 34 Page - STMicroelectronics |
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34 / 59 page ![]() NAND512-B, NAND01G-B, NAND02G-B, NAND04G-B, NAND08G-B 34/59 Blocks Lock-Down The Lock-Down feature provides an additional lev- el of protection. A Locked-down block cannot be unlocked by a software command. Locked-Down blocks can only be unlocked by setting the Write Protect signal to Low for a minimum of 100ns. Only locked blocks can be locked-down. The com- mand has no affect on unlocked blocks. Refer to Figure 25., Command Latch AC Wave- forms for details on how to issue the command. Block Lock Status In Block Lock mode (PRL High) the Block Lock Status of each block can be checked by issuing a Read Block Lock Status command (see Table 10.). The command consists of: ■ one bus cycle to give the command code ■ three bus cysles to give the block address After this, a read cycle will then output the Block Lock Status on the I/O pins on the falling edge of Chip Enable or Read Enable, whichever occurs last. Chip Enable or Read Enable do not need to be toggled to update the status. The Read Block Lock Status command will not be accepted while the device is busy (RB Low). The device will remain in Read Block Lock Status mode until another command is issued. If the device is not in the Block Lock mode (PRL Low) the Block Status can be read in the Status Register using the Read Status Register com- mand. Figure 20. Read Block Lock Status Operation Note: Three address cycles are required for 2,4 and 8 Gb devices. The 512Mb and 1Gb devices only require two address cycles. Table 16. Block Lock Status Note: X = Don’t Care. Status I/O7-I/O3 I/O2 I/O1 I/O0 Locked X 0 1 0 Unlocked X 1 1 0 Locked-Down X 0 0 1 Unlocked in Locked- Down Area X1 0 1 I/O R Block Address, 3 cycles ai08669 7Ah Read Block Lock Status Command Add1 Add2 Add3 Dout Block Lock Status tWHRL W |
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