LT8607 datasheet(10/20 Pages) AD

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LTC9111

Rev. 0

For more information www.analog.com

MDI_POWER1

In the MDI_POWER1 state, the wakeup signature circuitry

and SCCP pull-down are disabled. The LTC9111 current

draw is reduced to IPD_PWR1, allowing the PSE pull-up

current to charge the cable and port capacitance. When

the LTC9111 senses that its input voltage has risen above

VON, it advances to the MDI_POWERDELAY state.

When in MDI_POWER1 state, if the input voltage drops

below VSIG_ENABLE due to a fault, the LTC9111 re-enters

the WAKEUP state.

MDI_POWERDELAY

With the port voltage greater than VON, the PSE has nearly

finished ramping the port to the full operating voltage.

When the LTC9111 enters the MDI_POWERDELAY state, it

starts a timer tPWRDLY (> 80ms). This delay ensures the PSE

finishes ramping the port voltage before the application is

enabled, thereby preventing oscillatory behavior caused by

the cable and coupling network impedance. After the timer

expires, the LTC9111 enters the MDI_POWER2 state.

MDI_POWER2

When the LTC9111 enters the MDI_POWER2 state, the

PSE is ready to provide the full rated class power. The

external high-side MOSFET is enabled via a current source

on the GATE pin (see External Component Selection sec-

tion). An internal comparator monitors the GATE pin, and

when the GATE pin voltage exceeds the IN pin voltage

by VEN_ASSERT (6.5V min), the LTC9111 asserts the log-

ic-level EN pin. The EN pin can be used to enable the

DC/DC converter or application circuitry connected to the

OUT pin.

The LTC9111 remains in the MDI_POWER2 state until the

port voltage drops below VOFF. If the port voltage drops

below VOFF, the LTC9111 enters the DISCONNECT state.

The port voltage may drop due to physical disconnection

from the PSE or because the PSE initiated power removal.

DISCONNECT

When the LTC9111 enters the DISCONNECT state, the

external high-side MOSFET is turned off and the EN pin

is de-asserted. A compliant PSE will discharge the port

voltage to the range of VSLEEP (typically 3.3V). As the

port voltage drops below VSIG_ENABLE, the LTC9111 again

enters the WAKEUP state.

Thereafter, the PSE may re-perform classification of the

LTC9111 before applying full operating voltage to the

LTC9111. A PSE may also maintain the port at the ~3.3V

sleep voltage or disable the port entirely and discharge

the voltage to 0V, in which case the LTC9111 will return

to the RESET state.

POWER CLASS AND SCCP

Power Class is a key concept in the Power over Data Line

(PoDL) standard. Class defines both the PSE output voltage

range and the maximum power being sourced or drawn

in the system. PoDL defines 16 Classes (0 through 15).

Class 0 through 9 are defined by IEEE 802.3bu for auto-

motive systems. Class 10 through 15 are defined by IEEE

802.3cg for discoverable systems used in building and

factory automation. Classes 10 through 12 correspond to

a 24V nominal PSE output voltage, as demanded by many

industrial, factory automation, legacy building automation

and wet locations. Each of the three 24V classes represents

a different cabling definition and accompanying maximum

power transfer. Classes 13 through 15 provide a 54V nomi-

nal PSE output voltage, to maximize power transfer without

exceeding Safety Extra Low Voltage (SELV). Table 1 sum-

marizes the IEEE 802.3cg PSE and PD Class pairs.

In addition to their Power Class, PoDL PSEs and PDs

are identified with a Type based on their PHY compati-

bility. The LTC9111 is designed for PDs compatible with

10Base-T1L PHYs, which is defined as Type E.

Table 1. PSE and PD Valid Class Pairs

PSE

CLASS

MAX PD

POWER

(W)

VOLTAGE

(MIN)

(V)

VOLTAGE

(MAX)

(V)

IMAX

(mA)

COMPATIBLE

PD CLASS(ES)

1.23

3.2

240

10, 11

8.4

632

10, 11, 12

7.7

231

600

13, 14

1579

13, 14, 15

OPERATION

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