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L9908 датащи(PDF) 29 Page - STMicroelectronics |
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L9908 датащи(HTML) 29 Page - STMicroelectronics |
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29 / 153 page ![]() 5.4.1 Configuration mode activation An accidental SRR and SLR change must be avoided therefore a finite state machine is implemented to access the CONFIG mode. The CONFIG mode access state machine is composed by 2 sequential states, the passage from a state to the next one is carried out by the acknowledgment of a dedicated UNLOCK frames sequence to be written in the SPI register CFG_EN_UNLOCK (UNLOCK1 key: 0x55 → UNLOCK2 key: 0x33). The correct completion of the CONFIG Mode procedure gives access to SLR. Access to SRR is further masked until EN_BR = 0 or HBn_DIS = 1 [n = 1, 2, 3]. Table 18. CONFIG mode activation register CFG_EN_UNLOCK <7:0> Description 0x55 → 0x33 CONFIG Mode Access 0xAA CONFIG Mode Exit Note: • SRR and SLR configuration will become effective the next clock cycle after the completed writing operation. • Write attempts on SRR and SLR are ignored as long as the previous requirements aren`t met. • Write attempts on Read Only (RO) registers are ignored, no matter if the register is NSR, SLR or SRR. Figure 12. CONFIG mode state machine The configuration mode is left by a dedicated LOCK frame (LOCK key: 0xAA) to be written in the SPI register CFG_EN_UNLOCK, which confirms the written changes and locks them on writing. The configuration mode is also left automatically after the CONFIG mode time-out expiration: if no correct LOCK SPI frame is detected within T_cgf_time_out, the CONFIG mode is left. Note: All parameters are guaranteed and tested in the voltage ranges reported in Table 5 unless otherwise specified. Where not specified the parametrical operating range equals the functional operating range. Table 19. CFG timeout Symbol Parameter Min Typ Max Unit Notes T_cgf_time_out CFG Mode Time-out - 100 - ms Not subject to production test L9908 Configuration mode DS13546 - Rev 3 page 29/153 |
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