L9908 datasheet(27/153 Pages) STMICROELECTRONICS

27 / 153 page

NVM READ MODE

Internal supply and reference voltage/currents are available possibly exceeding spec parametrical ranges.

Main logic is out of reset (INT_RST = ’1’, Internal signal). Main functions are disabled:

–

Gate Driver Supply stage disabled

–

Half Bridge Gate Drivers stages are in HIZ mode while LS Half Bridge Gate Drivers stages are

shutdown (SAFE-HIZ)

–

Current Monitors chains and monitoring units are disabled

–

SPI Read is available while SPI Write is disabled

In this mode a CRC check on NVM data is first performed:

–

If no CRC error is detected the NVM content is deployed into main logic register

–

If a CRC error is detected the related main logic registers are reset to default values (all ‘0’) and

NVM_CRC_FAIL flag is set to ‘1’

Note:

All parameters are guaranteed and tested in the voltage ranges reported in Table 5 unless otherwise specified.

Where not specified the parametrical operating range equals the functional operating range.

Table 15. Power up/down timings

Symbol

Parameter

Min

Typ

Max

Unit

Notes

T_nvm

NVM data deploy & CRC duration

Not subject to production test

NORMAL MODE

Internal supply and reference voltage/currents are available and within spec ranges. Main logic is out of

reset (INT_RST = ’1’, Internal signal). Main functions:

–

Half Bridge Gate Drivers status depends on disable logic assessment (Functional or SAFE_DIS)

–

Gate Driver Supply stage status depends on configuration

–

Current Monitors chains and monitoring units status depend on configuration

–

SPI Read/Write operations are available

SAFE OFF MODE

Internal supply and reference voltage/currents are available and within spec ranges. Main logic is out of

reset (INT_RST = ’1’, Internal signal). Main functions:

–

Gate Driver Supply stage is disabled

–

HS and LS state are in SAFE_OFF or SAFE_HIZ depending on fault reaction as described in Table 17

–

Current Monitors chains and monitoring units status depend on configuration

–

SPI Read/Write operations are available

SELF TEST MODE

Internal supply and reference voltage/currents are available and within spec ranges. Main logic is out of

reset (INT_RST = ’1’, Internal signal). Main functions:

–

Gate Driver Supply stage depends on disable logic assessment

–

Half Bridge Gate Drivers are disabled (SAFE-DIS)

–

Current Monitors chains and monitoring units status depend on configuration

–

SPI Read is available while SPI Write is disabled

CONFIG MODE

Internal supply and reference voltage/currents are available and within spec ranges. Main logic is out of

reset (INT_RST = ’1’, Internal signal). Main functions:

–

Half Bridge Gate Drivers status depends on disable logic assessment (Functional or SAFE_DIS)

–

Gate Driver Supply stage status depends on configuration

–

Current Monitors chains and monitoring units status depend on configuration

–

SPI Read/Write operations are available

Three SPI readable flags are present to read-back the operational state machine status according to the following

table:

L9908

Device operation state machine

DS13546 - Rev 3

page 27/153

L9908 датащи(PDF) 27 Page - STMicroelectronics

L9908 датащи(HTML) 27 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL