L9908 datasheet(56/153 Pages) STMICROELECTRONICS

56 / 153 page

Symbol

Parameter

Test Condition

Min Typ Max Unit

Notes

CP2_iout2

Charge Pump2 Load

Current

CP1_lin_mode_th < VBP ≤ 60 V

CFLY2 = 1 μF

SHS_n = VDH

INHn = 1

mA [n = 1,2,3]

CP2_vout1

Charge Pump2 output

voltage at CBS_n-SHS-n

5.5 V ≤ VBP ≤ CP1_lin_mode_th

CFLY2 = 1 μF

SHS_n = VDH

INHn = 1

[n = 1,2,3]

CP2_vout2

Charge Pump2 output

voltage at CBS_n-SHS-n

CP1_lin_mode_th < VBP ≤ 60 V

CFLY2 = 1 μF

SHS_n = VDH

INHn = 1

[n = 1,2,3]

CP2_freq

Charge Pump2 Frequency -

400

kHz

Not subject to

production test

BT_lim2_ilim

BT Charge Limiter2

limitation current

SHS_n = VDH

INHn = 1

-8

-1

mA [n = 1,2,3]

BT_lim2_vlim

BT Charge Limiter2

limitation voltage

SHS_n = 0

BT1_DIS = 1

[n = 1,2,3]

CBT_boot_time_HB

CBT boot time at high

battery (VBP & VDH >

10V)

SHS_n = 0

CBT = 1 μF

CBS_n 0 V to 7 V

0.25

0.5

ms [n=1,2,3]

CBT_boot_time_LB

CBT boot time at low

battery (VBP & VDH <

10V)

SHS_n = 0

CBT = 1 μF

CBS_n 0 V to 7 V

0.5

ms [n=1,2,3]

Note:

All parameters are guaranteed, and tested, in the voltage ranges reported above in Table 5 unless otherwise

specified. Where not specified the parametrical operating range equals the functional operating range.

Bootstrap capacitance and Bootstrap Limiter 1 (BT1)

Bootstrap capacitance has the purpose of delivering the charge required for the external HS FET turn on

translating its voltage level over VDH.

These capacitances are charged from the C_VPRE through BT1n circuitries during the n-th half bridge (1-

D)*Tpwm interval (where Tpwm is the PWM period and D is the half bridge duty cycle).

BT1 develops this function by ensuring at the same time a current limitation to avoid in-rush current when CBS

are depleted and an over-voltage protection during HS turn-on phases and related voltage swing.

If Bootstrap Limiter 1 is disabled the charging path from VPRE is interrupted and bootstrap capacitors must be

charge by other means, e.g. from CP2. Bootstrap Limiter 1 can be disabled by the dedicated SPI bit BT1_DIS

within the register GEN_CFG3 as follows:

Table 52. Bootstrap limiter 1 disable bit

BT1_DIS

Description

Bootstrap Limiter 1 Enabled (Default)

Bootstrap Limiter 1 Disabled

L9908

Gate driver supply

DS13546 - Rev 3

page 56/153

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