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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AD8384ASVZ датащи(PDF) 20 Page - Analog Devices |
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AD8384ASVZ датащи(HTML) 20 Page - Analog Devices |
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20 / 24 page  AD8384 Rev. 0 | Page 20 of 24 AD8384 PCB DESIGN RECOMMENDATIONS Top PCB Layer Land Pattern Dimensions Pad Size: 0.6 mm × 0.25 mm Pad Pitch: 0.5 mm Thermal Pad Size: 6 mm × 6 mm Thermal via structure: 0.25 mm to 0.35 mm diameter via holes on a 0.5 mm to 1.0 mm grid. 14 mm LAND PATTERN – TOP LAYER 6 mm Figure 21. Land Pattern—Top Layer Bottom PCB Layer Thermal Pad and Thermal Via Connections The thermal pad on the solder side is connected to a plane. Use of thermal spokes is not recommended when connecting the thermal pads or via structure to the plane. LAND PATTERN – BOTTOM LAYER 6 mm Figure 22. Land Pattern—Bottom Layer Solder Masking Solder masking of the via holes on the top layer of the PCB plugs the via holes, inhibiting solder flow into the holes. To minimize the formation of solder voids due to solder flowing into the via holes (solder wicking), the via diameter should be made small and an optional solder mask may be used. To optimize thermal pad coverage, the solder mask’s diameter should be no more than 0.1 mm larger than the via hole diameter. Solder Mask—Top Layer Pads: Set by the customer’s PCB design rules. Thermal Via Holes: Circular mask, centered on the via holes. Diameter of the mask should be 0.1 mm larger than the via hole diameter. Solder Mask—Bottom Layer Set by customer’s PCB design rules. SOLDER MASK – TOP LAYER Figure 23. Solder Mask—Top Layer |
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