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AD8384ASVZ датащи(PDF) 17 Page - Analog Devices |
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AD8384ASVZ датащи(HTML) 17 Page - Analog Devices |
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17 / 24 page ![]() AD8384 Rev. 0 | Page 17 of 24 APPLICATIONS IMAGE PROCESSOR 1/3 AD8389 CLK DXI, CLXI, ENBX(1–4)I DXxO, CLXxO, ENBX(1–4)xO MONITxI µP AD8384 VID(0:5) DB(0:5) STSQ, XFR, CLK, R/L, INV DIRX, DIRY, DY, CLY, CLYN, NRG DIRXIN, DIRYIN, DYIN, CLYIN, NRGIN MONITI MONITO DX, CLX, CLXN, ENBX (1–4) DXIN, CLXIN, ENBXIN (1–4) SDI SCL SEN VAO1 VAO2 VRH, VRL, V1, V2, SVRH, SVRL DC REFERENCE VOLTAGES MONITOR VCOM LCD TIMING CONTROLS LCD TIMING CONTROLS 6-CHANNEL LCD CHANNEL 0–5 Figure 16. Typical Applications Circuit POWER SUPPLY SEQUENCING As indicated under the Absolute Maximum Ratings, the voltage at any input pin cannot exceed its supply voltage by more than 0.5 V. To ensure compliance with the Absolute Maximum Ratings, the following power-up and power-down sequencing is recommended. During power-up, initial application of nonzero voltages to any of the input pins must be delayed until the supply voltage ramps up to at least the highest maximum operational input voltage. During power-down, the voltage at any input pin must reach zero during a period not exceeding the hold-up time of the power supply. Power ON Sequence the applied voltages starting with the highest and proceeding toward the lowest. Apply AVCC and then proceed with applying the voltages in a decreasing order, for example VRH, V2, and so on. Apply DVCC last. Power OFF Remove voltages starting with the lowest and proceed toward the highest. Remove DVCC and then proceed with the voltages in an increasing order, for example V1, V2, VRH, and so on. Remove AVCC last. Failure to comply with the Absolute Maximum Ratings may result in functional failure or damage to the internal ESD diodes. Damaged ESD diodes may cause temporary parametric failures, which may result in image artifacts. Damaged ESD diodes cannot provide full ESD protection, reducing reliability. To Ensure Grounded Output Mode at Power-Off If references are active sources: 1. Program Grounded Output mode 2. Turn off references 3. Turn off AVCC 4. Turn off DVCC If references are passive voltage dividers dependent on AVCC: 1. Program Grounded Output mode 2. Set AVCC to 5 V 3. Hold for 1 ms 4. Turn off DVCC 5. Turn off AVCC |
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