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ADPD4200 датащи(PDF) 18 Page - Analog Devices

номер детали ADPD4200
подробное описание детали  Multimodal Sensor Front End
PDF  93 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

ADPD4200 датащи(HTML) 18 Page - Analog Devices

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Data Sheet
ADPD4200
THEORY OF OPERATION
analog.com
Rev. 0 | 18 of 93
Decimation
The DECIMATE_FACTOR_x bits determine the number of time slot
values used to create a 32-bit final sample value at a rate of
Sample Rate= 1/TIMESLOT_PERIOD_x/
DECIMATE_FACTOR_x+1
If DECIMATE_FACTOR_x is 0, the output sample rate equals the
time slot rate. The final value is the sum of the decimated samples.
There is no divide by (DECIMATE_FACTOR_x + 1) operation
performed on the decimated data, but final data values can be
bit shifted to the right before being written to the FIFO, creating
a direct average when the number of samples is a power of 2.
DECIMATE_TYPE_x selects the method of decimation used. A
setting of 0 selects a simple block sum with other settings allowing
higher order CIC filters up to fourth order. If using higher order
CIC filters for the signal data, the dark data still uses the simple
block sum at the same decimation rate. Each time slot maintains
its own block sum or CIC filter state. The entire decimation path
uses a 32-bit datapath. When using the CIC filter, the number of
bits required for the result is dependent on the number of pulses,
the decimation rate, and the order of the CIC filter according to the
following equation:
NBITS=14+log2Number of Pulses +
log2Decimation Rate CIC Order
It is up to the user to ensure that there is no undesired overflow.
Final data results can be read from data registers or a 512-byte
data FIFO. Data written to the FIFO is configurable to allow the
different data registers, formats, and data sizes as required. Each
time slot can use its own decimation rate. Data from each time slot
is written to the FIFO at its respective ODR.
Subsampling
The ADPD4200 supports a subsampling mode that allows selected
time slots to run at slower sampling rates than the programmed
sampling rate. For example, in a multiparameter application where
most of the measurements must be taken at a sampling rate of
300 Hz but one of the measurements must only be taken at
25 Hz, the subsampling mode can be used on the time slot that
only needs to operate at 25 Hz. To enable subsampling mode
for a specific time slot, set the SUBSAMPLE_x bit to 1 and set
the DECIMATE_FACTOR_x bits to the desired subsampling rate.
The subsampled time slot then samples only once every (DECI-
MATE_FACTOR_x + 1) cycle, instead of operating every time slot
sequence. If other time slots are decimating at the same rate, the
subsampled cycles occur at the same time the decimated data is
presented to the FIFO. For example, if Time Slot A is operating
at 300 Hz but decimating to 25 Hz, and Time Slot B is set to
subsample by 12, both time slots write the FIFO during the same
time slot sequence and at the same rate.
More complicated patterns can be made if the decimate and sub-
sample rates for the enabled time slots are different. The user
must manage the varying packet sizes by reading the data in
multiples of the repeating packet size. For example, if Time Slot A
is not decimating or subsampling, Time Slot B is subsampling every
second cycle, and Time Slot C is subsampling every fourth cycle,
the data pattern written to the FIFO is A, AB, A, ABC, and so on, as
the repeating packet.
Decimation and subsampling have the same effect on the output
data rate. The only difference is that the decimated time slots
operate every input cycle but produce data at the slower rate using
the on-chip decimating filter. The subsampling time slots only occur
at the slower rate.
Status bytes are written to the FIFO every wake-up period, regard-
less of which time slots execute. Using the same example as the
different decimate and subsample rates scenario, but with a status
byte enabled, the pattern is AS, ABS, AS, ABCS, and so on, where
S is a status byte.
FIFO
Data is written to the FIFO at the end of each sampling period.
This packet can include 0, 8-, 16-, 24-, or 32-bit data for each
of the dark data and signal data values. The bit alignment of
the data written to the FIFO is selectable with a shift of 0 bits
to 31 bits, with saturation provided. Lower bits are ignored. The
DARK_SHIFT_x and SIGNAL_SHIFT_x bit fields select the number
of bits to shift the output data to the right before writing to the
FIFO. The DARK_SIZE_x and SIGNAL_SIZE_x bit fields select the
number of bytes of each field to be written from 0 bytes to 4 bytes.
When set to 0, no data is written for that data type. If there are any
nonzero bits at more significant bit positions than those selected,
the data written to the FIFO is saturated. If both channels are
enabled, all selected Channel 1 data values are written to the FIFO
first, followed by the Channel 2 data.
For example, in modes that utilize dark data, the eight upper bits
of the dark data can be stored with 24 appropriately selected bits
from the signal data for each time slot to allow detection of whether
the ambient light is becoming large, while limiting the size of the
amount of data transferred.
Data is written to the FIFO at the end of the sampling period only
if there is enough FIFO space left to write data for each active
timeslot. For example, if one active timeslot is running at an ODR
of 100 Hz and a second timeslot is decimating by 4 or subsampling
at 1/4th the rate of the first timeslot for an ODR of 25 Hz, data is
only going to be written to the FIFO at the end of the sampling
period if there is enough room for both active timeslots to write
data, regardless of whether or not the timeslot that is decimating
or subsampling is supposed to write data during that sampling
period. It is up to the user to manage the data appropriately at the
microprocessor end when using timeslots with different decimation
and/or subsampling rates.



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