ADPD4200 datasheet(73/93 Pages) AD

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Data Sheet

ADPD4200

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Rev. 0 | 73 of 93

Table 27. Interrupt Status and Control Register Details

Addr

Name

Bits

Bit Name

Description

Reset Access1

INT_LEV1_G

Time Slot G Level 1 Interrupt Status. This bit is set during a data

0x0

R/W1C

INT_LEV1_F

Time Slot F Level 1 Interrupt Status. This bit is set during a data

0x0

R/W1C

INT_LEV1_E

Time Slot E Level 1 Interrupt Status. This bit is set during a data

0x0

R/W1C

INT_LEV1_D

Time Slot D Level 1 Interrupt Status. This bit is set during a data

0x0

R/W1C

INT_LEV1_C

Time Slot C Level 1 Interrupt Status. This bit is set during a data

0x0

R/W1C

INT_LEV1_B

Time Slot B Level 1 Interrupt Status. This bit is set during a data

0x0

R/W1C

INT_LEV1_A

Time Slot A Level 1 Interrupt Status. This bit is set during a data

0x0

R/W1C

0x0007

INT_ACLEAR

INT_ACLEAR_FIFO

FIFO Threshold Interrupt Autoclear Enable. Set this bit to enable

automatic clearing of the FIFO_TH interrupt each time the FIFO is

read.

0x1

R/W

[14:12]

Reserved

Reserved.

0x0

INT_ACLEAR_DATA_L

Time Slot L Interrupt Autoclear Enable. Set this bit to enable

automatic clearing of the INT_DATA_L interrupt each time the Time

Slot L data registers are read.

0x1

R/W

INT_ACLEAR_DATA_K

Time Slot K Interrupt Autoclear Enable. Set this bit to enable

automatic clearing of the INT_DATA_K interrupt each time the Time

Slot K data registers are read.

0x1

R/W

INT_ACLEAR_DATA_J

Time Slot J Interrupt Autoclear Enable. Set this bit to enable

automatic clearing of the INT_DATA_J interrupt each time the Time

Slot J data registers are read.

0x1

R/W

INT_ACLEAR_DATA_I

Time Slot I Interrupt Autoclear Enable. Set this bit to enable

automatic clearing of the INT_DATA_I interrupt each time the Time

Slot I data registers are read.

0x1

R/W

INT_ACLEAR_DATA_H

Time Slot H Interrupt Autoclear Enable. Set this bit to enable

automatic clearing of the INT_DATA_H interrupt each time the Time

Slot H data registers are read.

0x1

R/W

INT_ACLEAR_DATA_G

Time Slot G Interrupt Autoclear Enable. Set this bit to enable

automatic clearing of the INT_DATA_G interrupt each time the Time

Slot G data registers are read.

0x1

R/W

INT_ACLEAR_DATA_F

Time Slot F Interrupt Autoclear Enable. Set this bit to enable

automatic clearing of the INT_DATA_F interrupt each time the Time

Slot F data registers are read.

0x1

R/W

INT_ACLEAR_DATA_E

Time Slot E Interrupt Autoclear Enable. Set this bit to enable

automatic clearing of the INT_DATA_E interrupt each time the Time

Slot E data register is read.

0x1

R/W

INT_ACLEAR_DATA_D

Time Slot D Interrupt Autoclear Enable. Set this bit to enable

automatic clearing of the INT_DATA_D interrupt each time the Time

Slot D data registers are read.

0x1

R/W

INT_ACLEAR_DATA_C

Time Slot C Interrupt Autoclear Enable. Set this bit to enable

automatic clearing of the INT_DATA_C interrupt each time the Time

Slot C data registers are read.

0x1

R/W

INT_ACLEAR_DATA_B

Time Slot B Interrupt Autoclear Enable. Set this bit to enable

automatic clearing of the INT_DATA_B interrupt each time the Time

Slot B data registers are read.

0x1

R/W

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