ADFS5758 datasheet(69/75 Pages) AD

69 / 75 page

Data Sheet

ADFS5758

Rev. 0 | Page 69 of 75

Bits

Bit Name

Description

Reset

Access

0x16: status register.

0x17: CHIP_ID register.

0x18: FREQ_MONITOR register.

0x19: DEVICE_ID_0 register.

0x1A: DEVICE_ID_1 register.

0x1B: DEVICE_ID_2 register.

0x1C: DEVICE_ID_3 register.

Digital Diagnostic Results Register

Address: 0x14, Reset: 0x14A000, Name: DIGITAL_DIAG_RESULTS

This register contains an error flag for the on-chip digital diagnostic features, most of which are configurable using the digital diagnostic

configuration register. This register also contains a flag to indicate that a reset occurred, as well as a flag to indicate that the calibration

memory has not refreshed or an invalid SPI access attempted. With the exception of the CAL_MEM_UNREFRESHED and SLEW_BUSY

flags, all of these flags require a 1 to be written to them to update them to their current value. The CAL_MEM_UNREFRESHED and

SLEW_BUSY flags automatically clear when the calibration memory refresh or output slew, respectively, is complete. When the

corresponding enable bits in the DIGITAL_DIAG_CONFIG register are not enabled, the respective flag bits read as zero.

Table 46. Bit Descriptions for DIGITAL_DIAG_RESULTS

Bits

Bit Name

Description

Reset

Access

FAULT_PIN_STATUS

The FAULT_PIN_STATUS bit reflects the inverted current status of the FAULT pin.

0x0

[20:16]

REGISTER_ADDRESS

0x0

CAL_MEM_UNREFRESHED

Calibration memory unrefreshed flag. Note that modifying the range bits in

the DAC_CONFIG register also initiates a calibration memory refresh, which

asserts this bit. Unlike the R/W-1-C bits in this register, this bit is automatically

cleared after the calibration memory refresh completes.

0x1

0: calibration memory is refreshed.

1: calibration memory is unrefreshed (default on power-up). Note that this

bit asserts if the range bits are modified in the DAC_CONFIG register.

SLEW_BUSY

This flag is set to 1 when the DAC is actively slewing. Unlike the R/W-1-C bits

in this register, this bit is automatically cleared when slewing is complete.

0x0

RESET_OCCURRED

This bit flags that a reset occurred (default on power-up is therefore Logic 1).

0x1

R/W-1-C

ERR_3WI

This bit flags an error in the interdie 3-wire interface communications.

0x0

R/W-1-C

WDT_LATE_ERR

This bit flags a late WDT fault.

0x0

R/W-1-C

WDT_EARLY_ERR

This bit flags an early WDT fault.

0x0

R/W-1-C

BKGND_CRC_ERR

This bit flags an error for the background CRC calculation of the combined

calibration memory and register configuration space. Note that this bit also

flags if a parity error occurs during a 3-wire read and compare transaction.

0x0

R/W-1-C

DAC_LATCH_MON_ERR

This bit flags if the output of the DAC latches does not match the input.

0x0

R/W-1-C

DUAL_CAL_ERR

This bit flags if the dual calibration comparison registers a fail.

0x0

R/W-1-C

INVERSE_DAC_CHECK_ERR

This bit flags if a fault it detected between the DAC code driven by the

digital core and an inverted copy.

0x0

R/W-1-C

CAL_MEM_CRC_ERR

This bit flags a CRC error for the CRC calculation of the calibration memory

upon refresh.

0x0

R/W-1-C

INVALID_SPI_ACCESS_ERR

This bit flags if an invalid SPI access is attempted, such as writing to or

reading from an invalid or reserved address. This bit also flags if an SPI write

is attempted directly after powering up but before a calibration memory

refresh is performed or if an SPI write is attempted while a calibration

memory refresh is in progress. Performing a two stage readback is permitted

during a calibration memory refresh and does not cause this flag to set.

Attempting to write to a read only register also causes this bit to assert.

0x0

R/W-1-C

CFG_LOCK_CHECK_ERR

This bit flags if there is a write attempted on the user configuration space

when it is locked.

0x0

R/W-1-C

SCLK_COUNT_ERR

This bit flags an SCLK falling edge count error. 32 clocks are required if SPI

CRC is enabled and 24 clocks or 32 clocks are required if SPI CRC is not enabled.

0x0

R/W-1-C

ADFS5758 датащи(PDF) 69 Page - Analog Devices

ADFS5758 датащи(HTML) 69 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75

датащи скачать

ссылки URL