STM32L010K4 datasheet(22/91 Pages) STMICROELECTRONICS

22 / 91 page

Functional overview

STM32L010F4/K4

22/91

DS12323 Rev 3

16 configurable interrupt/event lines. The 7 other lines are connected to RTC, USART, I2C,

LPUART or LPTIM events.

3.8

Memories

The STM32L010F4/K4 integrate the following memories:

•

2 Kbytes of embedded SRAM accessed (read/write) at CPU clock speed with 0 wait

state. With the enhanced bus matrix, operating the RAM does not lead to any

performance penalty during accesses to the system bus (AHB and APB buses).

•

the non-volatile memory divided into three arrays:

–

16 Kbytes of embedded Flash program memory

–

128 bytes of data EEPROM

–

information block containing 32 user and factory options bytes, plus 4 Kbytes of

system memory

The user options bytes are used to write-protect or read-out protect the memory (4-Kbyte

granularity) and/or readout-protect the whole memory with the following options:

•

Level 0: no protection

•

Level 1: memory readout protected

The Flash memory cannot be read or written if either debug features are connected or

boot in RAM is selected.

•

Level 2: chip readout protected, debug features (Cortex-M0+ serial wire) and boot in

RAM selection disabled (debugline fuse)

3.9

Direct memory access (DMA)

The flexible 7-channel, general-purpose DMA is able to manage memory-to-memory,

peripheral-to-memory and memory-to-peripheral transfers. The DMA controller supports

circular buffer management, avoiding the generation of interrupts when the controller

reaches the end of the buffer.

Each channel is connected to dedicated hardware DMA requests, with software trigger

support for each channel. Configuration is done by software and transfer sizes between

source and destination are independent.

The DMA can be used with the main peripherals: SPI, I2C, USART, LPUART,

general-purpose timers, and ADC.

3.10

Analog-to-digital converter (ADC)

A native 12-bit, extended to 16-bit through hardware oversampling, analog-to-digital

converter is embedded into the STM32L010F4/K4. The ADC has up to 10 external channels

and one internal channel (voltage reference). Three channels (PA0, PA4 and PA5) are fast

channels, while the others are standard channels.

The ADC performs conversions in single-shot or scan mode. In scan mode, automatic

conversion is performed on a selected group of analog inputs.

The ADC frequency is independent from the CPU frequency, allowing maximum sampling

rate of 1.14 Msps even with a low CPU speed. The ADC consumption is low at all

STM32L010K4 датащи(PDF) 22 Page - STMicroelectronics

STM32L010K4 датащи(HTML) 22 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91

датащи скачать

ссылки URL