поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

Preview PDF HTML

STM32L010K4 датащи(PDF) 79 Page - STMicroelectronics

номер детали STM32L010K4
подробное описание детали  Value line ultra-low-power 32-bit MCU Arm®-based Cortex®-M0, 16-Kbyte Flash memory, 2-Kbyte SRAM, 128-byte EEPROM, ADC
PDF  91 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L010K4 датащи(HTML) 79 Page - STMicroelectronics

Back Button STM32L010K4 Datasheet HTML 75Page - STMicroelectronics STM32L010K4 Datasheet HTML 76Page - STMicroelectronics STM32L010K4 Datasheet HTML 77Page - STMicroelectronics STM32L010K4 Datasheet HTML 78Page - STMicroelectronics STM32L010K4 Datasheet HTML 79Page - STMicroelectronics STM32L010K4 Datasheet HTML 80Page - STMicroelectronics STM32L010K4 Datasheet HTML 81Page - STMicroelectronics STM32L010K4 Datasheet HTML 82Page - STMicroelectronics STM32L010K4 Datasheet HTML 83Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 79 / 91 page
background image
DS12323 Rev 3
79/91
STM32L010F4/K4
Electrical characteristics
81
Table 59. SPI characteristics in voltage Range 3 (1)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
fSCK
1/tc(SCK)
SPI clock frequency
Master mode
--
2
MHz
Slave mode
2(2)
Duty(SCK)
Duty cycle of SPI clock
frequency
Slave mode
30
50
70
%
tsu(NSS)
NSS setup time
Slave mode, SPI presc = 2
4Tpclk
-
-
ns
th(NSS)
NSS hold time
Slave mode, SPI presc = 2
2Tpclk
-
-
tw(SCKH)
tw(SCKL)
SCK high and low time
Master mode
Tpclk - 2
Tpclk
Tpclk + 2
tsu(MI)
Data input setup time
Master mode
3
-
-
tsu(SI)
Slave mode
3
-
-
th(MI)
Data input hold time
Master mode
16
-
-
th(SI)
Slave mode
14
-
-
ta(SO
Data output access time
Slave mode
30
-
70
tdis(SO)
Data output disable time
Slave mode
40
-
80
tv(SO)
Data output valid time
Slave mode
-
26.5
47
Master mode
-
4
6
tv(MO)
Data output hold time
Slave mode
20
-
-
th(SO)
Master mode
3
-
-
1. Guaranteed by characterization results, not tested in production.
2. The maximum SPI clock frequency in slave transmitter mode is determined by the sum of tv(SO) and tsu(MI) which has to fit
into SCK low or high phase preceding the SCK sampling edge. This value can be achieved when the SPI communicates
with a master having tsu(MI) = 0 while Duty(SCK) = 50%.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com