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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM32L010K4 датащи(PDF) 71 Page - STMicroelectronics |
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STM32L010K4 датащи(HTML) 71 Page - STMicroelectronics |
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71 / 91 page  DS12323 Rev 3 71/91 STM32L010F4/K4 Electrical characteristics 81 Figure 22. Recommended NRST pin protection 1. The reset network protects the device against parasitic resets. 2. The external capacitor must be placed as close as possible to the device. 3. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in Table 51. Otherwise the reset will not be taken into account by the device. 6.3.15 12-bit ADC characteristics Unless otherwise specified, the parameters given in Table 52 are values derived from tests performed under ambient temperature, fPCLK frequency and VDDA supply voltage conditions summarized in Table 15: General operating conditions. Note: It is recommended to perform a calibration after each power-up. Table 51. NRST pin characteristics Symbol Parameter Conditions Min Typ Max Unit VIL(NRST)(1) 1. Guaranteed by design, not tested in production. NRST input low level voltage -- - 0.3VDD V VIH(NRST)(1) NRST input high level voltage - 0.39VDD+ 0.59 - - VOL(NRST)(1) NRST output low level voltage IOL = 2 mA 2.7 V < VDD < 3.6 V -- 0.4 IOL = 1.5 mA 1.8 V < VDD < 2.7 V -- Vhys(NRST)(1) NRST Schmitt trigger voltage hysteresis -- 10%VDD(2) 2. 200 mV minimum value -mV RPU Weak pull-up equivalent resistor(3) 3. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution to the series resistance is around 10%. VIN = VSS 25 45 65 kΩ VF(NRST)(1) NRST input filtered pulse -- - 50 ns VNF(NRST)(1) NRST input not filtered pulse - 350 - - ns ai17854c STM32Lxx RPU NRST(2) VDD Filter Internal reset 0.1 μF External reset circuit(1) |
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