STM32F730V8 datasheet(115/202 Pages) STMICROELECTRONICS

115 / 202 page

DS12536 Rev 2

115/202

STM32F730x8

Electrical characteristics

185

6.3.9

External clock source characteristics

High-speed external user clock generated from an external source

In bypass mode the HSE oscillator is switched off and the input pin is a standard I/O. The

external clock signal has to respect the Table 61: I/O static characteristics. However, the

recommended clock input waveform is shown in Figure 28.

The characteristics given in Table 38 result from tests performed using an high-speed

external clock source, and under ambient temperature and supply voltage conditions

summarized in Table 16.

tWUSTOP(2)

Wakeup from Stop mode

with MR/LP regulator in

Under-drive mode

Main regulator in under-drive mode

(Flash memory in Deep power-down

mode)

107.4

113.2

µs

Low power regulator in under-drive

mode

(Flash memory in Deep power-down

mode)

112.7

120

tWUSTDBY(2)

Wakeup from Standby

mode

Exit Standby mode on rising edge

308

313

µs

Exit Standby mode on falling edge

307

313

1. Guaranteed by characterization results.

2. The wakeup times are measured from the wakeup event to the point in which the application code reads the first

Table 37. Low-power mode wakeup timings (continued)

Symbol

Parameter

Conditions

Typ(1)

Max(1)

Unit

Table 38. High-speed external user clock characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fHSE_ext

External user clock source

frequency(1)

MHz

VHSEH

OSC_IN input pin high level voltage

0.7VDD

-VDD

VHSEL

OSC_IN input pin low level voltage

VSS

-0.3VDD

tw(HSE)

OSC_IN high or low time(1)

1. Guaranteed by design.

tr(HSE)

tf(HSE)

OSC_IN rise or fall time(1)

Cin(HSE) OSC_IN input capacitance(1)

DuCy(HSE) Duty cycle

OSC_IN Input leakage current

VSS ≤ VIN ≤ VDD

±1

µA

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