AD4134 datasheet(30/92 Pages) AD

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Data Sheet

AD4134

THEORY OF OPERATION

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Rev. 0 | 30 of 92

Similarly, due to the continuous time DAC used in the modulator

feedback loop, the AD4134 reference input also has a constant

resistive input characteristic, making it possible to drive the ADC

reference input directly with a voltage reference IC.

INHERENT ANTIALIASING FILTER (AAF)

When sampling an analog sinusoid signal at less than twice of its

frequency, reconstruction through interpolation results in a lower

frequency signal than the original. This phenomenon is known as

aliasing. Figure 61 shows an example of signal aliasing viewed

in both the time and frequency domains. The example shows the

digital discrete time representations of a 3 kHz, 17 kHz, and 23

kHz signal sampled at 20 kHz are identical. When interpolating the

result, the output is always a 3 kHz sine wave, which means that, in

this sampling system, the frequency component of the input signal

at 17 kHz and 23 kHz appear at 3 kHz in the output.

The aliasing occurs at the point of sampling of the analog signal.

The only way to guarantee the matching between input and out-

put signal frequency is to limit the input signal bandwidth before

sampling. In the previous example of the frequency component

input signal, if the signal is low-pass filtered with a bandwidth of

10 kHz, the interpolated output always matches the filtered input

signal. Because the purpose of the low-pass filter is to prevent high

frequency signals from aliasing down, the filter is also known as an

antialiasing filter.

The signal sampling occurs at the very front of the discrete time

ADC in the sample-and-hold circuit. An external antialiasing filter is

required in front of the discrete time ADC to protect it against signal

aliasing.

The antialiasing filter design requires a fine balance between the

aliasing rejection level and the phase and magnitude distortion of

the input signal. The extra components also introduce error, noise,

and additional power consumption to the signal chain.

Other than being easy to drive, the other major advantage of the

CTSD architecture is its inherent antialiasing property. Without the

sample-and-hold circuit, the sampling of the analog signal takes

place inside the CTSD modulator at the quantizer, after the integra-

tor. This sampling scheme allows the device to take advantage of

the low-pass response of the integrator and intrinsically reject sig-

nals around the sampling frequency of the modulator. This property

provides an inherent aliasing rejection of up to 102.5 dB for the

AD4134. As shown in Figure 62, combining the inherent antialiasing

response of the CTSD modulator with the low ripple wideband

digital filter, the AD4134 is fully protected from the out of band

frequency tones.

Figure 61. Aliasing Explained with an Example Shown in Both Time and Frequency Domains

Figure 62. Combined Magnitude Response of the Inherent Antialiasing Filter and the Digital Filter of the AD4134

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