AD4134 datasheet(49/92 Pages) AD

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Data Sheet

AD4134

DEVICE CONFIGURATION

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Rev. 0 | 49 of 92

ASRC Master Mode

In ASRC master mode, the AD4134 device generates the output

data at a programmable decimation ratio. The user can program the

decimation ratio in both pin control and SPI control mode to achieve

the desired output date rate.

In pin control mode, the decimation rate is fixed as per the pre-

defined pin control options. Sixteen decimation ratio options are

available through the configuration of the DEC0/DCLKIO pin to

DEC3/SDO pin. The final ODR value also depends on the digital

filter type. Table 28 summarizes the ODR values available in master

mode.

In SPI control mode, the ODR is available at the full range

described in Table 19. The ODR can be programmed via the

ODR_VAL_INT, Bits[23:0] bits and ODR_VAL_FLT, Bits[31:0] bits

with a resolution of 0.01 SPS.

In Example 1, for an ODR to be 187.23 kSPS, calculate the

decimation rate as follows:

Decimation Rate = 24 MHz/187.23 kHz =

24 MHz/187.23 kHz = 128.1846 = 0x0000802F4103E5

Program ODR_VAL_INT, Bits[23:0] with 0x80.

Program ODR_VAL_FLT, Bits[31:0] with 0x2F4103E5.

In Example 2, for an ODR to be 375 kSPS, calculate the decimation

rate as follows:

Decimation Rate = 24 MHz/375 kHz = 64 = 0x00004000000000

Program ODR_VAL_INT, Bits[23:0] with 0x000040.

Program ODR_VAL_FLT, Bits[31:0] with 0x00000000.

Every time the ODR_VAL_INT, Bits[23:0] and ODR_VAL_FLT,

Bits[31:0] are changed, the MASTER_SLAVE_TX_BIT in the

TRANSFER_REGISTER must be set to update the ODR to the

new value.

The user has the flexibility to change the ODR value, but that

means a loss of data of about 2 µs plus the filter settling time. The 2

µs time, tDELAY, is constant across the ODR range. See Figure 89

for more details.

The SPI control mode also allows the user to set a differ-

ent ODR rate for each of the four ADC channels using the

ODR_RATE_SEL_CHx bits. The ODR options are limited to 1, ½,

¼, or ⅛ of the ODR frequency.

Table 28. Output Data Rate Configuration in Pin Control Master Mode

DEC3

DEC2

DEC1

DEC0

Wideband 0.433 × ODR Filter (kSPS)

Sinc6 Filter (kSPS)

Sinc3 Filter (kSPS)

374

1496

325

1250

1000

285

1000

750

256

750

375

235

500

187.5

200

375

128

175

325

128

256

100

175

128

2.5

1.25

0.625

0.06

0.05

2.5

0.01

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